Nec Corporation

Sony Corporation

Renesas Electronics Corporation

Sony Interactive Entertainment Inc.

Mitsubishi Electric Corporation

Nec C Orporation

Sony Group Corporation

Yuji Ando

Tatsuo Nakayama

Hironobu Miyamoto

Yasuhiro Okamoto

Takashi Inoue

Kazuki Ota

Masaaki Kuzuhara

Kensuke Kasahara

Yuji Takahashi

Yasuhiro Murase

Yasuo Ohno

Akio Wakejima

Nobuyuki Hayama

Kazuaki Kunihiro

Naotaka Kuroda

Kazuomi Endo

Kohji Matsunaga

Katsumi Yamanoguchi

Kouji Matsunaga

Satoshi Mitsuhashi

Kazuhiro Suzuki

Takefumi Nagumo

Ryohei Okada

Osamu Ota

Hideyuki Ichihashi

Hidenori Shimawaki

Nobuyoshi Miyahara

Koji Hataya

Takashi Kojima

Jun Kimura

Masami Ogata

Takayuki Shinohara

Kazuhiko Onda

Keisuke Yamaoka

Nobuaki Izumi

Hironari Sakurai

Hiroyuki Yasuda

Masashi Eshima

Naotaka Iwata

Yiwen Zhu

Daisuke Tsuru

Goh Kobayashi

Hideo Toyoshima

Masakazu Kouno

Tomohiro Itoh

Koji Matsunaga

Chiharu Miyazaki

The present technology relates to an information processing device, an information processing method, a program, and a movable object that enable prevention of a user from suffering from motion sickness. The information processing device includes: a display-position setting unit configured to move, on the basis of the motion of a movable object, the display position of a first picture viewed from a predetermined point of view of the movable object; and a display control unit configured to perform display control based on the display position set. The present technology can be applied to, for example, a vehicle that displays a picture in superimposition on the ambient scenery.

Information processing device, information processing method, program, and movable object

A plurality of electronic circuit boards (), on which electronic components are mounted, is inserted in parallel through an electronic circuit insertion port () of a casing body (). A gap () is formed between front panels () of inserted and adjacent electronic circuit boards () inserted. A bridge body () constituting conduction means electrically conducts a first conductive side portion () of a front panel () in one electronic circuit board () of adjacent electronic circuit boards () and a second conductive side portion () of a front panel () in another electronic circuit board () that faces the first conductive side portion () via a gap ().

Electronic machine

There is provided an encoder that enables an image of a field-of-view range of a user to be displayed immediately. The encoder encodes, for a pair of opposite surfaces among a plurality of surfaces of a model for an omnidirectional image, a first composite image obtained by combining an omnidirectional image of a first surface of a high resolution and an omnidirectional image of a second surface of a resolution lower than the high resolution and a second composite image obtained by combining an omnidirectional image of the second surface of the high resolution and an omnidirectional image of the first surface of a low resolution. For example, the present disclosure can be applied to an image display system or the like.

Image processing device and image processing method

There is provided an encoding apparatus, including an intra-block determination section which determines that a prediction mode of a block is a forced intra-prediction mode, by a frequency based on a priority of each block of an image to be encoded, an encoding section which encodes the block, to which the prediction mode has been determined to be an intra-prediction mode by the intra-block determination section, with the intra-prediction mode, and a transmission section which transmits an encoded result of the image to be encoded obtained by the encoding section, and the prediction mode of the image.

Encoding apparatus, encoding method and program

An information processing apparatus includes: a storage unit configured to store information on a plurality of encoders; and a control unit configured to be capable of transmitting a first instruction signal for instructing the plurality of encoders to encode input video data under first encoding conditions different for each of the plurality of encoders, and obtaining, if an image quality of the video data encoded by the plurality of encoders does not satisfy a predetermined criteria, predetermined information associated with the image quality from the encoded video data and transmitting, based on the predetermined information, a second instruction signal for instructing to encode the input video data under a second encoding condition different from the first encoding conditions to at least one encoder of the plurality of encoders.

Information processing apparatus, information processing system and information processing method

Provided is an imaging control device including a result receiving unit configured to receive an example image selected by an image processing device used for image processing using image information, the image information being information regarding an image captured by an imaging unit used for image capturing, a selection result transmitting unit configured to transmit information regarding the example image received by the result receiving unit to the image processing device, a setting receiving unit configured to receive setting information generated by the image processing device based on the example image transmitted from the selection result transmitting unit, the setting information indicating a setting condition when image capturing is performed like the example image, and a setting change unit configured to change an imaging setting of the imaging unit using the setting information received by the setting receiving unit.

Imaging control device, image processing device, imaging controlling method, and image processing method

In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a&#x2265;5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 &#x212b;) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.

Field effect transistor, and multilayered epitaxial film for use in preparation of field effect transistor

A high electron mobility transistor having a channel layer, electron supply layer, source electrode, and drain electrode is included so as to have a cap layer formed on the electron supply layer between the source and drain electrodes and having an inclined side surface, an insulating film having an opening portion on the upper surface of the cap layer and covering the side surface thereof, and a gate electrode is formed in the opening portion and extending, via the insulating film, over the side surface of the cap layer on the drain electrode side. The gate electrode having an overhang on the drain electrode side can reduce the peak electric field.

Semiconductor device

A semiconductor device including a field effect transistor including a substrate, a lower barrier layer provided on the substrate, a channel layer provided on the lower barrier layer, an electron supplying layer provided on the channel layer, a source electrode and a drain electrode provided on the electron layer, and a gate electrode provided between the source electrode and the drain electrode. The lower barrier layer includes a composition of InAlN (0&#x2266;z&#x2266;1). The channel layer includes a composition of AlGaN (0&#x2266;x&#x2266;1). A recess is provided in a region between the source electrode and the drain electrode, wherein the recess goes through the electron supplying layer to a depth that exposes the channel layer, and the gate electrode is disposed on a gate insulating film that covers a bottom surface and an inner wall surface of the recess.

Semiconductor device and field effect transistor with controllable threshold voltage

A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition InAlN (0&#x2266;z&#x2266;1), a channel layer having a composition of: AlGaN (0&#x2266;x&#x2266;1) or InGaN (0&#x2266;y&#x2266;1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode.

Provided is a semiconductor device in which the trade-off between the withstand voltage and the on-resistance is improved and the performance is increased. A semiconductor device comprises a substrate, a first n-type semiconductor layer', a second n-type semiconductor layer, a p-type semiconductor layer, and a third n-type semiconductor layer&#x2032;, wherein the first n-type semiconductor layer&#x2032;, the second n-type semiconductor layer, the p-type semiconductor layer, and the third n-type semiconductor layer&#x2032; are laminated at the upper side of the substratein this order. The drain electrodeis in ohmic-contact with the first n-type semiconductor layer&#x2032; and the source electrodeis in ohmic-contact with the third n-type semiconductor layer&#x2032;. A gate electrodeis arranged so as to fill an opening portion to be filled that extends from the third n-type semiconductor layer&#x2032; to the second n-type semiconductor layer, and the gate electrodeis in contact with the upper surface of the second n-type semiconductor layer, the side surfaces of the p-type semiconductor layer, and the side surfaces of the third n-type semiconductor layer&#x2032;. The second n-type semiconductor layerhas composition that changes from the drain electrodeside toward the source electrodeside in the direction perpendicular to the plane of the substrateand contains donor impurity.

Semiconductor device and field effect transistor

Field effect transistor containing a group III nitride semiconductor as main component

The present invention provides a field effect transistor which can achieve both of a high threshold voltage and a low on-state resistance, a method for producing the same, and an electronic device. In the field effect transistor, each of a buffer layer, a channel layer, a barrier layer, and a spacer layeris formed of a group-III nitride semiconductor, and each of the upper surfaces thereof is a group-III atomic plane that is perpendicular to a (0001) crystal axis. The lattice-relaxed buffer layer, the channel layerhaving a compressive strain, and the barrier layerhaving a tensile strain, and the spacer layerhaving a compressive strain are laminated on a substratein this order. The gate insulating filmis arranged on the spacer layer. The gate electrodeis arranged on the gate insulating film. The source electrodeand the drain electrodeare electrically connected to the channel layerdirectly or via another component.

Field effect transistor, method for producing the same, and electronic device

In a high electron mobility transistor, with a normally-off operation maintained, on-resistance can be sufficiently reduced, so that the performance of a semiconductor device including the high electron mobility transistor is improved. Between a channel layer and an electron supply layer, a spacer layer whose band gap is larger than the band gap of the electron supply layer is provided. Thereby, due to the fact that the band gap of the spacer layer is large, a high potential barrier (electron barrier) is formed in the vicinity of an interface between the channel and the electron supply layer.

Semiconductor device and method of manufacturing the same

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Tokyo, Japan

Yuji Ando