Shinko Electric Industries Co., Ltd.

Japan Electronic Materials Corporation

Yuichiro Shimizu

Kosuke Fujihara

Ryo Fukasawa

Chikaomi Mori

Masahiro Sunohara

Michio Horiuchi

Noriyoshi Shimizu

Tomoo Yamasaki

Kiyoshi Oi

Sumihiro Ichikawa

Masaya Tsuno

Daisuke Matono

Katsunori Yamagishi

Koji Takei

Koji Nagai

Yasunari Suzuki

Noriyasu Shimizu

A light emitting device includes a ceramic substrate, a light emitting element, and a wiring. The light emitting element is formed on an upper surface of the ceramic substrate. The wiring is arranged inside the ceramic substrate and is electrically and directly connected to the light emitting element. The light emitting element includes a structure in which a lower semiconductor layer, an active layer, and an upper semiconductor layer are sequentially stacked.

Light emitting device with wiring enclosed by ceramic substrate

A probe guide plate includes a first silicon substrate having first through-holes formed therein, an insulation layer formed on the first silicon substrate and having an opening on a region in which the first through-holes are arranged, a second silicon substrate arranged on the insulation layer and having second through-holes formed at positions corresponding to the first through-holes, and a silicon oxide layer formed on exposed surfaces of the first silicon substrate and the second silicon substrate.

Probe guide plate and probe device

A probe guide plate includes a first silicon substrate, a first recess portion formed in an upper surface of the first silicon substrate, first through-holes formed in the first silicon substrate at a bottom of the first recess portion, a second silicon substrate directly bonded on the first silicon substrate, a second recess portion formed to face the first recess portion in a lower surface of the second silicon substrate, and second through-holes formed in the second silicon substrate at a bottom of the second recess portion and arranged to correspond to the first through-holes, A notch portion is formed at an upper end portion of an inner wall of each of the first through-holes of the first silicon substrate.

A probe guide plate includes: a silicon substrate including one surface and the other surface opposite to the one surface; a through hole formed through the silicon substrate to extend from the one surface of the silicon substrate to the other surface of the silicon substrate; a silicon oxide layer formed on the one surface of the silicon substrate, the other surface of the silicon substrate, and an inner wall surface of the through hole; and a protective insulating layer formed on the silicon oxide layer. The protective insulating layer is formed on at least one of the one surface and the other surface of the silicon substrate via the silicon oxide layer, and partially formed on the inner wall surface of the through hole via the silicon oxide layer.

Probe guide plate having a silicon oxide layer formed on surfaces and on an inner wall of a through hole thereof, and a protective insulating layer formed on the silicon oxide layer, and probe apparatus including the probe guide plate

OBJECT To improve the strength of a probe guide and improve the abrasion resistance of the probe guide. MEANS FOR SETTLEMENT A guide plateis formed of a silicon platehaving guide holesrespectively adapted to support contact probes, the inner walls of the guide holesinclude a guide filmformed on the inner wall surfaces of corresponding penetration-processed holesof the silicon plate, the cross-sectional areas of the penetration-processed holesgradually increase toward a first surface of the silicon plate, and the film thickness of the guide filmgradually increases toward the first surface of the silicon plate. By employing such a configuration, as compared with the tilts of the inner wall surfaces of the penetration-processed holes, the tilts of the inner wall surfaces of the guide holescan be suppressed, and the strength of the silicon platecan be improved. Accordingly, the abrasion resistance of a probe guidecan be improved.

Probe guide, probe card, and method for probe guide manufacturing

A wiring substrate includes a first wiring structure and a second wiring structure stacked thereon. The first wiring structure includes a first insulation layer and a via wiring extending through the first insulation layer. The second wiring structure includes a first wiring layer formed on the first insulation layer and the via wiring, and a first plane layer stacked on the first insulation layer and at least partially grid-shaped in a plan view to define second through holes. A second insulation layer is stacked on the first insulation layer to fill the second through holes and cover the first plane layer and the first wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The second through holes each include a lower open end and an upper open end having a smaller open width than the lower open end.

Wiring substrate, semiconductor device, and method for manufacturing wiring substrate

A probe guide plate used for a semiconductor inspection apparatus that inputs and outputs an electrical signal for inspecting an object via a probe needle, the probe guide plate includes a silicon substrate provided with a through hole that penetrates the silicon substrate from one surface to another surface through which the probe needle is inserted, the through hole including a first tapered portion provided at an end portion at the one surface side such that the hole size of which increases as it approaches the one surface, and a second tapered portion provided at an end portion at the other surface side such that the hole size of which increases as it approaches the other surface; and a silicon oxide film formed on an inner wall surface of the through hole including the first tapered portion and the second tapered portion.

Probe guide plate and semiconductor inspection apparatus

A wiring board includes a substrate body provided with a through hole penetrating the substrate body from one surface to another surface; and a through wiring formed in the through hole and including a first metal layer formed on a part of an inner side surface of the through hole at the one surface side, a first wiring layer that covers the first metal layer to fill a part of the through hole at the one surface side, a second metal layer continuously formed on the rest part of the inner side surface of the through hole at the other surface side and on an end portion of the first wiring layer at the other surface side, and a second wiring layer that covers the second metal layer to fill a part of the through hole at the other surface side.

Wiring board with through wiring

There is provided a wiring substrate. The wiring substrate includes: a first wiring layer; a first insulating layer on the first wiring layer; a first coupling agent layer on the first insulating layer; a first copper/tin alloy layer on the first coupling agent layer; a first via hole formed through the first copper/tin alloy layer, the first coupling agent layer, and the first insulating layer to reach the first wiring layer; a metal catalyst provided on only a sidewall of the first via hole; a seed layer provided on the metal catalyst and formed only on the sidewall of the first via hole; and a metal plating layer formed on the first copper/tin alloy layer and the seed layer and filled in the first via hole to contact the first wiring layer.

Wiring substrate

A method of manufacturing a wiring substrate, includes obtaining a laminated body in which a first copper tin alloy layer and a copper layer are arranged in sequence on a first coupling agent layer, on a first insulating resin layer, forming a seed layer on the copper layer, forming a plating resist in which an opening portion is provided on the seed layer, forming a metal plating layer in the opening portion of the plating resist by applying an electroplating that utilizes the seed layer as a plating power feeding path, removing the plating resist, and forming a first wiring layer on the first coupling agent layer by etching the seed layer, the copper layer, and the first copper tin alloy layer while using the metal plating layer as a mask.

Wiring substrate and method of manufacturing the same

A solar cell module is provided with a plurality of dye sensitized solar cells arranged on a plane and connected in series with an intercell region interposed therebetween. A first transparent substrate, a first transparent conductive film, a dye carrying oxide semiconductor layer, an electrolyte layer, a catalyst layer, a second transparent conductive film and a second transparent substrate are laminated. An insulating barrier seals cells on both sides thereof in fluid tightness and insulates them in the intercell region. An electrode connecting portion provided in a vertical central part of the insulating barrier connects an extended portion of the first transparent conductive film of one of the cells to that of a second transparent conductive film of the other cell, and the electrode connecting portion penetrates through at least one of the first transparent substrate and the second transparent substrate in the vertical direction and is thus exposed.

Growing community of inventors

Nagano, Japan

Yuichiro Shimizu