Hitachi, Ltd.

Yuichiro Mahara

Akihiro Machida

Sojiro Hagihara

Teruo Okamura

A PDP apparatus having a driving circuit in which a circuit for applying a rising-slope waveform in a reset period, a circuit for applying a falling-slope waveform, and a clamp circuit for generating a falling waveform having a dulled waveform between the rising-slope waveform and the falling-slope waveform are comprised. The clamp circuit comprises a bidirectional switch having two FETs, and a gate feedback circuit is connected to a gate portion of the FET at a panel side. The PDP apparatus reduces a current noise occurring in a sustain electrode throughout the panel when switching the rising-slope waveform and the falling-slope waveform, thereby solving problems such as an increase of unnecessary radiation and stress on elements such as FETs on the path.

Growing community of inventors

Fujisawa, Japan

Yuichiro Mahara