Sony Corporation

Renesas Electronics Corporation

Canon Kabushiki Kaisha

Tokyo Shibaura Electric Co., Ltd.

Tamagawa Seiki Co., Ltd.

Yuichi Takagi

Kazuhiko Ueda

Naohiro Nishikawa

Masami Tako

Shigeo Ikeda

Masayoshi Kanazawa

Makoto Tsuchimochi

Masayuki Katakura

Hiroshi Matsui

Takashi Tsunoda

Yoshihiro Komatsu

Motoyasu Yano

Hiroshi Kushihara

Ren Imaoka

Mitsuru Suzuki

Genichiro Oga

Teruaki Tanaka

Mitsuo Aihara

Hiroshi Tachimori

Asako Toda

Masataka Kawase

Genichiro Ohga

Masao Kaizuka

A video signal receiving apparatus receives a first and second video signals for transmitting a same video content. When determining a size adjustment amount of a second video included in the second video signal, the video signal receiving apparatus performs scaling processing on a second image included in the second video signal to generate a scaling image and performs shift processing on the second image to generate a shift image. The video signal receiving apparatus calculates a similarity degree between a first image included in the first video signal and the scaling image, calculates a similarity degree between the first image and the shift image, and uses the scaling image or the shift image having the higher calculated similarity degree as an image to be subjected to the next scaling processing and the next shift processing.

Video signal receiving apparatus and video signal receiving method

A data processing device, includes a bus, a demultiplexer which receives content including video data and audio data. A memory interface which is coupled to the bus, and which is connectable to a memory for temporarily accumulating the video data and the audio data output from the demultiplexer.

Content output device and program

A data processing device, includes a bus, a demultiplexer which receives content including video data and audio data. A memory interface is coupled to the bus, and is connectable to a memory for temporarily accumulating the video data and the audio data output from the demultiplexer.

A data processing device, includes a bus, a demultiplexer which is coupled to the bus, and which receives a content including video data and audio data. A memory interface which is coupled to the bus, and which is connectable to a memory for temporarily accumulating the video data and the audio data output from the demultiplexer in accordance with a delay amount.

At the time of device starting or channel switching in a content output device, even when buffering of a sufficiently large size is performed in order to address multimedia processing at the time of start of a device and content switching, slow reproduction in which video and audio are synchronized with each other can be performed without keeping a user waiting for a long time, and at an arbitrary reproduction rate with the extent of not giving the user feeling of unnaturalness. The broadcasting reception unit initializes the delay amount to a predetermined start value, then gradually increases it with lapse of time, and stops the increase when the delay amount reaches a predetermined end value. Video and audio are synchronously and slowly reproduced at a reproduction rate decided by an increment per unit time of the delay amount.

At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case. According to a further aspect, a solid-state imaging apparatus for photoelectrically converting, with an imaging device, an image formed by introducing imaging light into the inside of the apparatus is provided with a package having a dark space in itself and accommodating the imaging device in the dark space, and a pinhole for introducing imaging light into the dark space and forming an image of an imaging object on the imaging face of the imaging device.

Solid-state imaging apparatus and camera using the same

At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits are provided. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case. According to a further aspect, a solid-state imaging apparatus for photoelectrically converting, with an imaging device, an image formed by introducing imaging light into the inside of the apparatus is provided with a package having a dark space in itself and accommodating the imaging device in the dark space, and a pinhole for introducing imaging light into the dark space and forming an image of an imaging object on the imaging face of the imaging device.

A temperature-compensated crystal oscillator including an oscillation circuit which includes an oscillator, a temperature detector, a voltage variable capacitance element coupled to an oscillation loop of the oscillation circuit, and a temperature compensation circuit. The temperature compensation circuit is configured to apply a compensation voltage to the voltage variable capacitance element to compensate a temperature change in response to temperature data detected by the temperature detector. The temperature compensation circuit has a plurality of correction point data. The respective correction point data is set in advance for each divided temperature zone, selects a first correction point data in a lower temperature zone and a second correction point data in a higher temperature zone, as compared with the detected temperature data, performs an interpolation between the first and second correction point data by a weighted averaged first-order interpolation, and generates the compensation voltage.

Temperature-compensated crystal oscillator and temperature compensation method for oscillator

A circuit having a plurality of driver IC's-to-n provided corresponding to divided areas of a display panel, each driver having an output circuit for outputting a supplied reference current IREF as a drive current to corresponding divided areas DRVAto DRVAn of the display paneland reference current source circuits-to-n for sampling and holding the reference current input from the reference current input terminal, then supplying the same to the output circuit, the reference current input terminal being connected to the reference current input terminal of another driver by a common current interconnect CML, and the reference current being distributed to the reference current source circuits of drivers by time division. According to the present invention, luminance steps among drivers driving the display (driven object) by division can be made sufficiently small, and a large size, high dynamic range display organic EL display, which cannot be realized by the conventional method of supply of the reference current, can be realized.

Current output drive circuit and display device

A resolver use angle detection IC subjected to a phase lock operation so as to follow not an angle &#x3b8;(t) for detection, but a phase angle &#x3c9;ot&#xb1;&#x3b8;(t) having an offset of a frequency &#x3c9;ot in the phase lock units. For this reason, when the excitation frequency &#x3c9;ot is set sufficiently high with respect to the frequency of the angle &#x3b8;(t), the phase angle &#x3c9;ot&#xb1;&#x3b8; to be followed in the phase lock units will not become zero. For this reason, an angle having a high precision can be found in real time regardless of the configuration not including the conventional apparatus in which the configuration is complex and the power consumption is large like a bipolar VCO and an up/down type counter.

Angle detection apparatus computing phase differences between first and second phase angles

A defect detection of light-emitting diodes (LEDs) is electrically performed on a large-scale display, comprising a plurality of light-emitting diodes arranged by a predetermined arrangement on an image display face, voltage detection portions for applying a constant current to a plurality of light-emitting diodes in an off region at a forward voltage or less in accordance with an input of a signal indicating a defect detection mode and detecting voltages between terminals of light-emitting diodes arising when the constant current flows there through, and a defect detection portion for electrically detecting a defect from the plurality of light-emitting diodes based on detection results of the voltage detection portion; and drive circuit devices (driver ICs) having the above configuration are serially connected and an electric signal indicating a result of defect detection is output from its final stage.

Image display device, drive circuit device and defect detection method of light-emitting diode

A modulation circuit for outputting a pulse signal modulated in accordance with the value of input data by a predetermined period, comprising a clock generation circuit for generating and outputting a first clock pulse changing in frequency by the predetermined period, a clock counting circuit for receiving the first clock pulse, counting the first clock pulse from a predetermined initial value in an initial stage of the predetermined period, and outputting a clock count and a pulse signal output circuit for comparing magnitudes of the clock count and the value of the input data and inverting a level of the pulse signal in the vicinity of a time when the magnitudes of the clock count and the value of the input data invert.

Modulation circuit and image display using the same

A modulation circuit capable of high resolution pulse width modulation while keeping down the bit length and an image display provided with the modulation circuit. By the A/D converter , the video signal Sv converted into a binary code having a preset bit length is divided into a plurality of binary codes by the controller from the most significant bit to the least significant bit. Corresponding to the thus obtained plurality of divided binary codes, serial data is generated for producing a pulse current of a pulse width and current value according to the value of the binary code and is output to pulse width modulation circuits cascade connected to the controller . The pulse width modulation circuits supply LEDs of the pixels pulse currents of pulse widths and current values corresponding to the serial data.

Modulation circuit, image display using the same, and modulation method

A modulation circuit and an image display able to be set to match the relation of luminance data and a luminance of a LED with a &ggr;-characteristic of a CRT without increasing the bit length of the luminance data or performing pre-processing, such as making corrections to the luminance data. By the A/D converter, the digitalized luminance data is converted into serial data by the controller and is output to pulse width modulation circuits in cascade connection. In each pulse width modulation circuit, a pulse current of a pulse width corresponding to the luminance data is generated, and the LED connected to each pulse width modulation circuit is driven by the current to emit light. Further, the amplitude of the pulse current is variable in accordance with the count of a counter for counting clock signals in the period of the pulse current. As a result, the relation of the time-averaged pulse current flowing in the LED and the luminance data can be made to match the &ggr;-characteristic of a CRT.

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Kanagawa, Japan

Yuichi Takagi