Rohm Co., Ltd.

Yuichi Shinozaki

Isao Yamamoto

Jun Maede

Shinya Karasawa

Shigenobu Shimohagi

A gate drive circuit for a switching circuit including high-side and low-side transistors which are GaN-HEMTs (High Electron Mobility Transistors), includes: a high-side driver driving the high-side transistor; and a low-side driver driving the low-side transistor, wherein the low-side driver is configured to be capable of applying 0 V, a high-level voltage higher than a gate threshold voltage of the low-side transistor, and a bias voltage lower than the gate threshold voltage between a gate and a source of the low-side transistor, and the low-side driver is configured to apply the bias voltage between the gate and the source of the low-side transistor during a dead time inserted during transition from a high-level output state where the high-side transistor is turned on and the low-side transistor is turned off to a low-level output state where the high-side transistor is turned off and the low-side transistor is turned on.

Gate drive circuit for switching circuit, module including the same, and switching power supply

There is provided a semiconductor package including a mounting frame having a conductive chip mounting region, a first semiconductor chip mounted on the chip mounting region and including a first semiconductor element, a second semiconductor chip mounted on the chip mounting region and including a second semiconductor element, and a conductive clip of a plate shape. The conductive clip includes a first component disposed above the mounting frame with the first semiconductor chip interposed therebetween, and a second component separated from the first component and disposed above the mounting frame with the second semiconductor chip interposed therebetween. The second main electrode of the first semiconductor element and the first main electrode of the second semiconductor element are short-circuited by the chip mounting region, so that the first semiconductor element and the second semiconductor element are cascade-connected.

Semiconductor package

A driving circuit drives an N-channel or NPN high-side transistor. A level shift circuit includes an open-drain differential conversion circuit that converts an input signal Sinto a differential signal S/S, and a latch circuit that switches its state according to the differential output S/Sof the differential conversion circuit. A driver drives a high-side transistor according to an output of the level shift circuit. A bootstrap circuit generates a bootstrap voltage Vto be used as an upper-side power supply for the driver. Upon detecting an abnormal state, a protection circuit controls at least a part of the driving circuit except for the input signal Sso as to turn off the high-side transistor.

Driving circuit for high-side transistor

A power supply circuit is configured including a control circuit together with an output circuit including an external circuit component. A switching controller controls a switching transistor and a synchronous rectification transistor each configured as a switching element. A degradation detection circuit monitors a detection signal having a correlation with characteristic degradation of the circuit component, and detects the degree of characteristic degradation of the circuit component. The switching controller is capable of changing its operation according to the degree of characteristic degradation of the circuit component.

Control circuit for switching power supply

A first detector compares an electric signal to be monitored with a first threshold. A second detector compares the electric signal with a second threshold. A first memory stores setting data of the first threshold. A second memory stores setting data of the second threshold. An interface circuit receives data from an external processor, and writes the data thus received to the first memory and the second memory. The protection circuit is configured such that data writing to the first memory is possible only when a predetermined condition is satisfied.

Protection circuit

A control circuit of a digital control power supply circuit includes: an A/D converter that samples a feedback voltage according to an output voltage of the power supply circuit when a strobe signal is asserted, and converts the sampled feedback voltage into digital feedback data; an error detector that generates error data which indicates a difference between the feedback data and target data; a compensator that generates a duty command value which is adjusted to approximate the error data to zero; a digital pulse width modulator that receives the duty command value and generates a pulse signal having a duty ratio corresponding to the duty command value; and a strobe signal generator that generates the strobe signal and adjusts a sampling timing at which the strobe signal is asserted such that the sampling timing approximates a target position set in a substantial center of a slope of the output voltage.

Control circuit and control method of digital control power supply circuit, and digital control power supply circuit, electronic device and base station using the same

A DC/DC converter includes: a transformer; a main MOS transistor connected in series between a primary side inductance of the transformer and a ground potential; a synchronous rectification MOS transistor connected in series between a secondary side inductance of the transformer and the ground potential; a refluxing MOS transistor connected between a secondary side output of the transformer and the ground potential; and a controller. If an operation is stopped, the controller stops the main MOS transistor and stops the synchronous rectification MOS transistor and the refluxing MOS transistor after a lapse of a predetermined period of time.

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Kyoto, Japan

Yuichi Shinozaki