Shin-etsu Handotai Co., Ltd.

Yuichi Shimizu

Koji Kitagawa

Tatsuo Enomoto

Kazutoshi Mizushima

Toshiaki Otaka

A wire saw apparatus including: a plurality of wire guides; a wire row formed of a wire which is wound around the plurality of wire guides and configured to reciprocatively travel in an axial direction; a nozzle configured to supply a coolant or slurry to the wire; a workpiece-holding portion configured to suspend and hold a workpiece plate having a workpiece bonded thereto with a beam interposed therebetween; a workpiece-feeding mechanism configured to press the workpiece against the wire row; and a mechanism configured to adjust a parallelism of axes of the plurality of wire guides around which the wire row is formed. Thereby, a wire saw apparatus and a method for manufacturing a wafer are provided which enable manufacturing of a wafer having any warp shape by controlling a warp in a wire travelling direction of a sliced workpiece.

Wire saw apparatus and method for manufacturing wafer

A wire saw apparatus including: a wire row formed of a wire wound around a plurality of wire guides and reciprocatively travels in an axial direction; a nozzle from a coolant or slurry is supplied to the wire; and a workpiece feed mechanism presses a held workpiece against the wire row, the wire saw apparatus slice the workpiece into a wafer shape by pressing the workpiece held by the workpiece feed mechanism against the wire row and feeding it for slicing while supplying the coolant or the slurry from the nozzle to the wire, the wire saw apparatus nozzle is arranged above the wire row to be orthogonal to the wire row, and windbreak plates are arranged on both left and right sides of the arranged nozzle seen from an axial direction.

Wire saw apparatus

A semiconductor-wafer evaluation method includes: before the mirror-polishing step, measuring warp data of displacement of the surface of the semiconductor wafer with a capacitive shape measurement device; setting a prescribed width of an outer circumferential portion of the semiconductor wafer as a sampling range; performing fitting of the warp data within the sampling range with a fitting function in a predetermined fitting range; calculating a difference (Range) between a maximum and a minimum of the warp data after the fitting within the sampling range; and, after the mirror-polishing step, evaluating the nanotopography of the surface of the semiconductor wafer on the basis of the calculated difference (Range).

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Nishigo-mura, Japan

Yuichi Shimizu