Murata Manufacturing Co., Ltd.

Yuichi Sano

Atsushi Kurokawa

Hiroaki Tokuya

Kazuya Kobayashi

Toshihiro Tada

Daisuke Tokuda

A dielectric film is disposed on a semiconductor substrate, and a conductor including a bent section is arranged between the semiconductor substrate and the dielectric film. A pad is disposed on the dielectric film. The pad is covered with a protective film. The protective film has an opening through which an upper surface of the pad is exposed. The bent section in the conductor and the pad overlap each other as seen in plan view, and an inside corner and an outside corner in the bent section are chamfered.

Semiconductor device

A semiconductor chip is mounted on a substrate in a face-down manner. A metal film is arranged on a back surface of the semiconductor chip facing an opposite side from the substrate away from an edge of the back surface. A sealing resin layer seals the semiconductor chip with a part of the metal film being exposed from the sealing resin layer.

Semiconductor device and method for manufacturing semiconductor device

An electronic component whose reliability is less likely to decrease while its thermal conductivity is maintained. A semiconductor chip is mounted on a substrate. The semiconductor chip is sealed with a sealing resin layer. The sealing resin layer includes a binder and two types of fillers having a plurality of particles dispersed in the binder. As the two types of fillers, fillers at least one of whose physical quantities, which are average particle diameter and density, are different from each other are used. The total volume density of the fillers in the sealing resin layer decreases in an upward direction from the substrate, and a portion of the sealing resin layer in a height direction of the sealing resin layer has an area in which the two types of fillers are present in a mixed manner.

Electronic component

A semiconductor device includes a semiconductor chip mounted to a mounting substrate with an interposer interposed therebetween such that a surface of the semiconductor chip on which bumps are formed faces a surface of the mounting substrate. The mounting substrate has a plurality of metal parts formed as terminals on a surface of the mounting substrate and in contact with electrode pads connected to multilayer wiring. The semiconductor chip has a plurality of functional elements formed in an inner layer and a plurality of bumps formed in contact with element wiring lines of the functional elements such that the bumps protrude from the surface of the semiconductor chip. The interposer has a plurality of first recesses formed in the surface of the interposer facing the surface of the semiconductor chip on which the bumps are formed such that the first recesses accommodate only the bumps.

A semiconductor device includes electrodes which contain Au and which are placed above conductive layers in a region adjacent to stacked insulating films and also includes base layers which are composed of compositionally modulated layers and which are placed between the electrodes and the conductive layers. The base layers include lateral end sections composed of single layers projecting from lateral end sections of the electrodes in the direction of the interlayer interface between the insulating films; sections which are located under the electrodes and of which a major compositional component is Ti or Ti and W; and projecting sections which project from under the electrodes in the direction of the interlayer interface between the insulating films and of which compositional components are compositionally modulated to Ti and O, to Ti, O, and N, or to Ti, W, O, and N.

A semiconductor device includes a semiconductor element including a bipolar transistor disposed on a compound semiconductor substrate, a collector electrode, a base electrode, and an emitter electrode, the bipolar transistor including a collector layer, a base layer, and an emitter layer, the collector electrode being in contact with the collector layer, the base electrode being in contact with the base layer, the emitter electrode being in contact with the emitter layer; a protective layer disposed on one surface of the semiconductor element; an emitter redistribution layer electrically connected to the emitter electrode via a contact hole in the protective layer; and a stress-relieving layer disposed between the emitter redistribution layer and the emitter layer in a direction perpendicular to a surface of the compound semiconductor substrate.

A semiconductor device includes a semiconductor substrate, a first metal layer, an insulation layer, an organic layer, and a second metal layer. The first metal layer, the insulation layer, the organic layer, and the second metal layer are sequentially stacked on a surface of the semiconductor substrate. The first metal layer and the second metal layer are electrically connected to each other through vias formed in the insulation layer and the organic layer. The second metal layer includes an electrode pad at a position corresponding to the positions of the vias. At the interface between the surface of the semiconductor substrate and the first metal layer, a patch portion having a trapezoidal cross-sectional shape is disposed directly below the vias.

Growing community of inventors

Kyoto, Japan

Yuichi Sano