Rohm Co., Ltd.

Tdk Corporation

Yuichi Kokusho

Hirokazu Oki

Kiyoaki Hoshino

Seiichiro Kondo

Takuya Sakamoto

Shinji Kawata

Yoshiyuki Nakatani

Takayuki Matsuura

A window type watchdog timer includes a frequency dividing circuit for generating a frequency-divided clock signal by dividing a frequency of a reference clock signal; a monitoring circuit for monitoring occurrence of a first error in which clear control from a target device is interrupted for a first time or more, and occurrence of a second error in which an interval between two consecutive clear controls from the target device is shorter than a second time shorter than the first time, based on the frequency-divided clock signal; and outputting an error signal when the first error or the second error is detected; and a setting circuit for variably setting the first time and the second time by variably setting a frequency division ratio in the frequency dividing circuit and variably setting a detection condition of the first error and the second error.

Window type watchdog timer and semiconductor device

A monitoring device includes a monitoring part configured to detect an abnormality of a monitoring target, a self-diagnosis part configured to diagnose whether or not the monitoring part operates normally during a period from a startup time point of a power supply to an elapse time point at which a reset release waiting time elapses, and a reset control part configured to release a reset of a reset output signal on or after the elapse time point.

Monitoring device and motor vehicle including the same

There provided an AD converter that includes an analog processing part configured to select one of the measurement target voltages and a plurality of reference voltages for each channel, to output an analog voltage signal; a first selection part configured to select one of a plurality of analog voltage signals; a first AD conversion part configured to perform AD conversion on the analog voltage signal to generate a first original digital signal; a second selection part configured to select one of the plurality of analog voltage signals; a second AD conversion part configured to perform AD conversion on the analog voltage signal to generate a second original digital signal; a digital processing part configured to receive the first original digital signal and the second original digital signal; and a controller configured to control contents selected in the analog processing part, the first selection part, and the second selection part.

Ad converter

A switch drive circuit drives a full-bridge output stage connected to a transformer to alternately switch between a first cycle in which a current in a first direction is supplied to the transformer and a second cycle in which a current in a second direction is supplied to the transformer. The switch drive circuit includes a mode in which a dead time of the output stage is set in accordance with a magnitude of a current flown in one of the first and second cycles, the dead time becoming an operation changing factor in the other cycle. Or, the switch drive circuit includes a mode in which the dead time of the output stage is set in accordance with a magnitude of an average current obtained by averaging currents flown in the first and second cycles. Or, the switch drive circuit switches between these modes in accordance with a signal.

Switch drive circuit and switching power supply device using same

A switch driving circuit is provided, wherein the switch driving circuit has a function of periodically updating a simultaneous OFF time prepared to soft-switch an upper switch and a lower switch of a switching output circuit, and is configured to monitor how an output power or an input power of the switching output circuit is changed depending on previous updating of the simultaneous OFF time to determine new updated contents.

Switch driving circuit and switching power device using the same

A switching power supply includes: a switching output circuit generating an output voltage from an input voltage according to ON/OFF control of an output transistor by a pulse width modulation (PWM) signal; a first voltage generating circuit generating a first voltage based on a difference between the output voltage and a predetermined reference voltage; a second voltage generating circuit generating a triangular second voltage; a comparing circuit generating a comparison signal by comparing the first voltage and the second voltage; a clock oscillating circuit generating a clock signal; and a logic circuit generating a PWM signal in response to the clock signal and the comparison signal, wherein the second voltage generating circuit generates the second voltage by adding a first slope voltage having a first slope and a second slope voltage having a second slope according to current flown through the switching output circuit.

Growing community of inventors

Kyoto, Japan

Yuichi Kokusho