Ricoh Company, Ltd.

Mitsubishi Mining and Cement Co. Ltd.

Yuichi Ando

Yuki Nakamura

Shinji Matsumoto

Naoyuki Ueda

Yukiko Abe

Yuji Sone

Ryoichi Saotome

Sadanori Arae

Minehide Kusayanagi

Koichi Sogawa

Tokio Uetsuhara

Norio Yoshida

Kenji Iio

Kenichiro Kinoshita

Masao Kiyohara

A coating liquid for forming a metal oxide film, the coating liquid including: a metal source, which is at least one selected from the group consisting of inorganic salts, oxides, hydroxides, metal complexes, and organic acid salts; at least one alkali selected from the group consisting of organic alkalis and inorganic alkalis; and a solvent.

Coating liquid for forming metal oxide film, oxide film, field-effect transistor, and method for producing the same

A field-effect transistor including a semiconductor layer formed of an n-type metal oxide semiconductor, wherein the n-type metal oxide semiconductor includes indium oxide, wherein the indium oxide is n-type doped through introduction of one or more kinds of cations as dopants, and wherein the n-type metal oxide semiconductor has a peak detected at an angle corresponding to a (222) plane of indium oxide having a bixbite structure in an X-ray diffraction method using a two-dimensional detector.

Field-effect transistor, display element, image display device, and system

An inorganic EL element including: an anode; a hole transporting layer; a light emitting layer; an electron transporting layer; and a cathode, the anode, the hole transporting layer, the light emitting layer, the electron transporting layer, and the cathode being stacked, wherein the hole transporting layer is an oxide film, the light emitting layer is an oxide film, and the electron transporting layer is an oxide film.

Inorganic el element, display element, image display device, and system

(Object) To miniaturize a field-effect transistor. (Means of Achieving the Object) A field-effect transistor includes a semiconductor film formed on a base, a gate insulating film formed on a part of the semiconductor film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode formed in contact with the semiconductor film, wherein a thickness of the source electrode and the drain electrode is smaller than a thickness of the gate insulating film, and the gate insulating film includes a region that is not in contact with the source electrode or the drain electrode.

Field-effect transistor, method for producing same, display element, display device, and system

A coating liquid for forming an oxide, the coating liquid including: A element, which is at least one alkaline earth metal; and B element, which is at least one selected from the group consisting of gallium (Ga), scandium (Sc), yttrium (Y), and lanthanoid, wherein when a total of concentrations of the A element is denoted by Cmg/L and a total of concentrations of the B element is denoted by Cmg/L, a total of concentrations of sodium (Na) and potassium (K) in the coating liquid is (C+C)/10mg/L or less and a total of concentrations of chromium (Cr), manganese (Mn), iron (Fe), cobalt (Co), nickel (Ni), and copper (Cu) in the coating liquid is (C+C)/10mg/L or less.

Coating liquid for forming oxide, method for producing oxide film, and method for producing field-effect transistor

A coating liquid for forming an oxide or oxynitride insulator film, the coating liquid including: A element; at least one selected from the group consisting of B element and C element; and a solvent, wherein the A element is at least one selected from the group consisting of Sc, Y, Ln (lanthanoid), Sb, Bi, and Te, the B element is at least one selected from the group consisting of Ga, Ti, Zr, and Hf, the C element is at least one selected from the group consisting of Group 2 elements in a periodic table, and the solvent includes at least one selected from the group consisting of an organic solvent having a flash point of 21&#xb0; C. or more but less than 200&#xb0; C. and water.

Coating liquid for forming oxide or oxynitride insulator film, oxide or oxynitride insulator film, field-effect transistor, and method for producing the same

In a semiconductor device, N-type diffusion regions for providing an LDD structure are formed on a P-type substrate. A thick CVD deposited insulating film is formed on both the diffusion regions. A word line layer is formed on this deposited insulating film and a gate oxide film in a direction crossing the diffusion regions. Since the deposited insulating film is set to be thick, a capacity between one of the diffusion regions as a bit line layer and the word line layer is reduced so that a reading speed of the semiconductor device is improved. Further, a punch through proof pressure is increased since the diffusion regions have an LDD structure. Thus, it is possible to provide a planar cell structure which increases the reading speed and is advantageous in a fine structure. Another semiconductor device is also shown. A method for manufacturing the semiconductor device is further shown.

Method of manufacturing core implanted semiconductor devices

A semiconductor memory device includes a substrate, a first diffusion region composed of at least one longitudinal and continuous source region which is disposed on the substrate and commonly used for a plurality of memory transistors, and a second diffusion region composed of at least one longitudinal and continuous drain region which is disposed in parallel with the first diffusion region and commonly used for the plurality of memory transistors. A refractory metal film is disposed on each of the first and second diffusion regions. An electric insulation film is disposed on the refractory metal film. A plurality of parallel gate electrodes are disposed crossing over the first and second diffusion regions. And a gate oxide film is arranged to electrically insulate the gate electrodes from the diffusion regions.

Method for producing semiconductor memory device having a planar cell

A semiconductor memory device comprising a substrate, a longitudinal source diffusion layer for a plurality of memory transistor source regions continuously formed on the substrate, and a longitudinal drain diffusion layer for a plurality of memory transistor drain regions continuously formed on the substrate in parallel to the source diffusion layer. A word line is formed crossing over the diffusion layers. And an electrically insulating film is interposed between the word line and the diffusion layers. The insulating film is thicker than a gate oxide film formed between the diffusion layers.

Semiconductor memory device

A plunger type electromagnet is provided with an attractive plate connected to the plunger, with an improved configuration of plunger and stationary element, or with a flanged tubular member of magnetic material affixed to the axial end of a coiling bobbin, in order to increase the rate of change in the permeance of the magnetic circuit at the time of attractive operation and to enhance the sensitivity of the electromagnet. Furthermore, the surface area of the abutment faces of the stationary and movable elements is calibrated so as to control the attractive and retaining force thereof. In some embodiments, a permanent magnet is provided which is shaped in the form of an annulus and is magnetized in the direction of thickness of the annulus, so as to facilitate magnetization of the permanent magnet, to reduce the number of component parts, and to provide an electromagnet which is compact in size, light in weight, and suitable for mass production.

Plunger type electromagnet

A semiconductor integrated circuit device which comprises a substrate, a first continuous longitudinal diffusion layer formed in the substrate and a second continuous longitudinal diffusion layer constitutes source areas of a plurality of MOS transistors. The second diffusion layer constitutes drain areas of the transistors. The device further comprises a first polycide layer formed on and along each of the first and second diffusion layers in contact therewith and a second polycide layer for constituting a gate electrode of each of the transistors. The second polycide layer is formed on and transversing the first polycide layers in a direction perpendicular to the first and second diffusion layers. An insulation layer is interposed between the first and second polycide layers.

Growing community of inventors

Hyogo, Japan

Yuichi Ando