Winbond Electronics Corporation

Yueh-Cheng Chuang

Shih-Hsien Yang

Bor-Ru Sheu

A stacked spacer structure and process adapted for a stacked layer on a semiconductor substrate is described. The stacked spacer structure is formed on the sidewalls of the stacked layer which comprise a conductive layer and a cap layer thereon. A dielectric layer made of a material with low dielectric constant lower than that of silicon nitride is formed on the semiconductor substrate. A first silicon nitride layer is then formed over the substrate. The first silicon nitride layer and dielectric layer are etched sequentially to form an inner spacer on the sidewalls of the stacked layer. A second silicon nitride layer is formed over the substrate and is etched to form an outer spacer on the sidewalls of the inner spacer. By forming the stacked spacer structure of the present invention embedded in low dielectric material, the coupling capacitance produced therein will be greatly reduced.

Stacked spacer structure and process

A conductive contact structure to electrically connect to a source/drain region in a semiconductor substrate and a process of making the same. An inlay opening including a pad opening and a bottom opening is formed in the dielectric layer on the semiconductor substrate. The pad opening is larger than and located upon the bottom opening that exposes the source/drain region. The bottom opening and pad opening are sequentially filled with a polysilicon layer and a tungsten layer to form a bottom plug and a metal pad layer, respectively.

Conductive contact structure and process for producing the same

A method of improving the resistance (Rs) uniformity and repeatability of a wafer having a silicon layer thereon is provided. The silicon layer is treated with a low energy ion implantation process. The method includes the steps of cleaning a surface portion of the silicon layer to remove a native oxide layer from the surface portion of the silicon layer by using a dilute hydrofluoric acid (HF) solution; cleaning the surface portion of the silicon layer to remove a contaminant from the surface portion of the silicon layer by using a dilute hydrochloric acid (HCl); immersing the wafer into an ozone solution to form a chemical oxide layer on the silicon layer; annealing the silicon layer by a spike annealing rapid thermal process (RTP) for recovering the damaged silicon crystal structure of the silicon layer resulted from the low energy ion implantation process.

Growing community of inventors

Hsinchu, Taiwan

Yueh-Cheng Chuang