Global Communication Semiconductors, LLC

Yuefei Yang

Shing-Kuo Wang

Liping Daniel Hou

Wing Yau

Kun-Mao Pan

Dheeraj Mohata

Devices and processes for preparing devices are described for a bulk acoustic wave resonator. A stack formed over a substrate includes a piezoelectric film element, a first (e.g., bottom) electrode coupled to a first side of the piezoelectric film element, and a second (e.g., top) electrode that is coupled to a second side of the piezoelectric film element. A cavity is positioned between the stack and the substrate. The resonator includes one or more planarizing layers, including a first planarizing layer around the cavity, wherein a first portion of the first electrode is adjacent the cavity and a second portion of the first electrode is adjacent the first planarizing layer. The resonator optionally includes an air reflector around the perimeter of the piezoelectric film element. The stack is configured to resonate in response to an electrical signal applied between the first electrode and the second electrode.

Support structure for bulk acoustic wave resonator

A single-crystal bulk acoustic wave resonators with better performance and better manufacturability and a process for fabricating the same are described. A low-acoustic-loss layer of one or more single-crystal and/or poly-crystal piezoelectric materials is epitaxially grown and/or physically deposited on a surrogate substrate, followed with the formation of a bottom electrode and then a support structure on a first side of the piezoelectric layer. The surrogate substrate is subsequently removed to expose a second side of the piezoelectric layer that is opposite to the first side. A top electrode is then formed on the second side of the piezoelectric layer, followed by further processes to complete the BAW resonator and filter fabrication using standard wafer processing steps. In some embodiments, the support structure has a cavity or an acoustic mirror adjacent the first electrode layer to minimize leakage of acoustic wave energy.

Single-crystal bulk acoustic wave resonator and method of making thereof

A semiconductor device includes a semiconductor die, an N-doped region, an N-contact metal, a PN junction mesa, a P-contact metal, a first passivation layer, an anode feed metal, and a cathode feed metal. The semiconductor die may include a plurality of semiconductor layers disposed on an insulating substrate. The N-doped region may define an active area of the device. The N-contact metal may be disposed on a first portion of the N-doped region. The PN junction mesa may be disposed on a second portion of the N-doped region. The PN junction mesa may comprise a hyperabrupt N-doping layer disposed on the first portion of the N-doped region and a P-doped layer disposed on the hyperabrupt N-doping layer. The P-contact metal may be disposed on the P-doped layer of the PN junction mesa. The first passivation layer may cover the semiconductor layers of the semiconductor device and have openings for the N-contact metal and the P-contact metal. The anode feed metal may connect the P-contact metal to a first bond pad. The anode feed metal generally forms an arch from the P-contact metal to the first bond pad and the arch defines a space between the anode feed metal and the first passivation layer covering the semiconductor layers and a the of the PN junction mesa.

Method of making wide tuning range and super low capacitance varactor diodes

A device including a semiconductor die, a first contact, a second contact, a third contact, a first passivation layer, a second passivation layer and an interconnect metal. The semiconductor die may include a plurality of semiconductor layers disposed on a GaAs substrate. The first contact may be electrically coupled to a semiconductor emitter layer. The second contact may be electrically coupled to a semiconductor base layer. The third contact may be electrically coupled to a semiconductor sub-collector layer. The first passivation layer may cover one or more of the semiconductor and the contacts. The first passivation layer may comprise an inorganic insulator. The second passivation layer may comprise an inorganic insulator or organic polymer with low dielectric constant deposited on the passivation layer. The interconnect metal may be coupled to the first contact and separated from the first passivation layer by the second passivation layer.

Method of making high frequency InGaP/GaAs HBTs

A device includes a semiconductor die. The semiconductor die includes a plurality of semiconductor layers disposed on a GaAs substrate, including a first semiconductor layer having a first band-gap and a second semiconductor layer having a second band-gap. The semiconductor die further includes a contact layer disposed epitaxially upon the first semiconductor layer. The contact layer has a thickness that is less than a critical thickness. The second semiconductor layer is epitaxially disposed upon the contact layer. The contact layer has a third band-gap that is less than the first band-gap and the second band-gap. The semiconductor die further includes a conductive layer disposed upon the contact layer to form an ohmic contact. The conductive layer comprises one or more metal layers compatible with silicon processing techniques.

Gallium arsenide based device having a narrow band-gap semiconductor contact layer

A semiconductor device having a tunable capacitance is disclosed, comprising a substrate, a semiconductor base layer comprising a first semiconductor material having a first band-gap, and a plurality of successive semiconductor layers positioned between the substrate and the semiconductor base layer. The plurality of successive semiconductor layers includes a tuning layer comprising a second semiconductor material having a second band-gap larger than the first band-gap. Furthermore, the tuning layer has a non-uniform doping profile with doping concentration that varies in accordance with distance from a surface of the tuning layer proximal to the semiconductor base layer. The tunable capacitance of the semiconductor device varies in accordance with an applied voltage between the base layer and one of the successive semiconductor layers.

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Torrance, CA, United States of America

Yuefei Yang