Sharp Kabushiki Kaisha Corporation

Yudai Takanishi

Yohsuke Kanzaki

Masao Moriguchi

Yoshiki Nakatani

Takatsugu Kusumi

Tetsuya Okamoto

Yuhichi Saitoh

Tsuyoshi Inoue

Kenji Nakanishi

Yoshihito Hara

Yoshimasa Chikama

Yukinobu Nakata

Hiroshi Matsukizono

Michiko Takei

Yuichi Saito

Tetsuo Fukaya

The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

Circuit board, display device, and process for production of circuit board

A TFTis formed on a glass substrate, and a flattening resin filmcovering the TFTis formed. Furthermore, a moisture-proof protective filmcovering the entire surface of the flattening resin filmis formed. For the protective film, a SiOfilm, a SiN film, a SiON film, or a stacked film thereof is used. The edge surfaces of the flattening resin filmare disposed on the inner side of or under a seal, and are formed in a tapered shape. By this, the entry of moisture into the flattening resin filmis prevented, preventing display degradation. This effect becomes noticeable in a display device including an oxide semiconductor TFT.

Display device

A TFT substrate () includes a plurality of pixel electrodes () provided in a matrix, a plurality of TFTs () each provided for a corresponding one of the pixel electrodes (), and a plurality of auxiliary capacitors () each provided for a corresponding one of the pixel electrodes (). Each of the auxiliary capacitors () includes a capacitor line () made of a material identical to that of the gate electrode () of the TFT () and provided in a layer identical to that of the gate electrode () of the TFT (), the gate insulating film () provided so as to cover the capacitor line (), and a corresponding one of the pixel electrodes () provided on the gate insulating film () so as to overlap with the capacitor line () and being in conduction with a drain electrode ().

Thin film transistor substrate, method for manufacturing the same, and liquid crystal display panel

A thin film transistor includes a gate electrode (), a gate insulating film () covering the gate electrode (), a semiconductor layer () made of an oxide semiconductor and provided on the gate insulating film (), a source electrode () and a drain electrode () provided on the semiconductor layer () via easily reducible metal layers () and spaced apart from each other, with a channel region (C) interposed therebetween, a conductive region (E) provided in the semiconductor layer (), and a diffusion reducing portion () provided in the semiconductor layer (), for reducing diffusion of the conductive region (E) into the channel region (C).

Thin film transistor, display panel, and method for fabricating thin film transistor

A semiconductor device according to the present invention includes: a gate electrode () of a thin film transistor () and an oxygen supply layer (), the gate electrode () and the oxygen supply layer () being formed on a substrate (); a gate insulating layer () formed on the gate electrode () and the oxygen supply layer (); an oxide semiconductor layer () of the thin film transistor (), the oxide semiconductor layer () being formed on the gate insulating layer (); and a source electrode (S) and a drain electrode () of the thin film transistor (), the source electrode (S) and the drain electrode () being formed on the gate insulating layer () and the oxide semiconductor layer ().

Semiconductor device and display apparatus

A method of manufacturing a TFT substrate includes: forming a gate electrode () and a gate insulating film () on a substrate (); forming a source electrode () and a drain electrode () at a gap from each other on the gate insulating film (), and forming a drain connection part (); forming, after the step of forming the source electrode and the drain electrode, an oxide semiconductor layer () that contains a channel portion connecting the source electrode () to the drain electrode () and that contains an additional portion () covering the drain connection part (); oxidizing a surface of the oxide semiconductor layer (); forming a contact hole () in an insulating film () that covers the oxide semiconductor layer; removing a portion of the additional portion () of the oxide semiconductor layer that is located inside the contact hole (); and forming a conductive layer () that electrically connects the drain connection part () that has been exposed.

TFT substrate and method for manufacturing same

A TFTincludes a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, a drain electrode, etc. The semiconductor layeris comprised of a metal oxide semiconductor (IGZO), and has a source portionthat contacts the source electrode, a drain electrodethat contacts the drain electrode, and a channel portionthat is located between the source and drain portions. A reduced regionis formed at least in the channel portionof the semiconductor layer, and the reduced regionhas a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer

Thin film transistor

A semiconductor device of the present invention includes: a lower electrode (); a contact layer () including a first contact layer (), a second contact layer () and a third contact layer () overlapping with a semiconductor layer (); and an upper electrode () including a first upper electrode (), a second upper electrode () and a third upper electrode (). The second contact layer () includes a first region (), and a second region () separate from the first region (), and the second upper electrode () is directly in contact with the semiconductor layer () in a region between the first region () and the second region () of the second contact layer ().

Semiconductor device

Disclosed is a thin film transistor wherein an ON current is increased and a leak current is reduced. The channel layerof the TFTis formed of a crystalline silicon, and the lower surface of one end of the channel layeris electrically connected to the surface of an nsilicon layer, and the lower surface of the other end is electrically connected to the surface of an nsilicon layer. Furthermore, the side surface of said end of the channel layeris electrically connected to a source electrode, and the side surface of the other end is electrically connected to a drain electrode. Thus, a barrier that makes electrons, which act as carriers, not easily transferred is formed on the boundary between the source electrodeand the channel layer. As a result, the ON current that flows when the TFTis in the ON state can be increased, and the leak current that flows when the TFT is in the OFF state can be reduced.

Thin film transistor and display device

An auxiliary capacitor () includes a capacitor line (), a gate insulating film () provided so as to cover the capacitor line (), a semiconductor layer () provided on the gate insulating film () so as to overlap with the capacitor line (), and a drain electrode () provided on the semiconductor layer () and connected to a pixel electrode (). The semiconductor layer () made of an oxide semiconductor and the pixel electrode () made of an oxide conductor contact each other.

The present invention aims at reducing an OFF current in a thin film transistor while maintaining an ON-state current. A TFT () includes a glass substrate () formed thereon with a source electrode () and a drain electrode () having their respective upper surfaces formed with n-type silicon layers () of microcrystalline silicon. Microcrystalline silicon regions () are formed respectively on the n-type silicon layers () while an amorphous silicon region () is formed on the glass substrate (), and these are covered by a microcrystalline silicon layer (). Therefore, ON-state current flows from the drain electrode (), through the microcrystalline silicon region (), the microcrystalline silicon layer () and the microcrystalline silicon region () in this order, and then to the source electrode (). Also, OFF current is limited by the amorphous silicon region ().

Growing community of inventors

Osaka, Japan

Yudai Takanishi