Synopsys, Inc.

Yuchen Xu

Zhe Zhao

Goichiro Ono

Meng-Tse Chen

Yang Song

Wenxin Wang

Yu Sui

Chia-Wei Liang

He Yin

An emulation system traverses trace buffers to read data captured from a design under test (DUT). The emulation system receives a request to read at least a portion of DUT data. The emulation system reads a header of the latest sample of the DUT data, where header of each sample of the DUT data includes one or more pointers to a previously stored sample. The samples of the DUT data are partitioned into frames and sectors. The emulation system can identify samples of the DUT data using the pointers in the header of the samples and compare time stamps of the samples against a specified time stamp in the received request. After identifying a sample having the specified time stamp, the emulation system may read the sample for output to the user (e.g., reconstructing a waveform using the sample).

Trace buffer data management for emulation systems

A configuration to address a bus stall during data packet transmission also allows for bus recover due to data packet transmission errors. If a downstream node is not ready to receive data from a buffer of an upstream node, a timer counts a timeout value. The time count increments on each clock cycle in which the downstream node is not ready to receive data. The buffer is cleared at the upstream node when the count reaches a predetermined threshold value. Alternately, the configuration also operates to receive a packet header from an upstream node, the packet header identifying a number of data in a packet. If no data downstream is received on a clock cycle, a counter triggers and is incremented for each cycle in which no date is received. When a threshold is reached dummy data fills a data packet to then transmit the data.

Self-recovery mechanism for multi-hosts and multi-devices emulation and prototyping system bus

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San Jose, CA, United States of America

Yuchen Xu