Cadence Design Systems, Inc.

Yubao Meng

Ping Liu

Jilin Tan

Ambrish Kant Varma

Dennis Nagle

Feras Al-Hawari

Jose Emmanuel Schutt-Aine

Zhongyong Zhou

Qi Zhao

Shangli Wu

The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of a node voltage and a branch current associated with the electrical circuit using, at least in part, a latency insertion method, the method may further include performing one or more simulations on a second model of an electrical circuit, the one or more simulations incorporating, at least in part, the input/output buffer data file and the latency insertion method.

System, method, and computer program product for input/output buffer modeling

Growing community of inventors

Shanghai, China

Yubao Meng