Lumentum Operations LLC

Yuanzhen Zhuang

Sean Burns

Lucas Morales

Raman Srinivasan

Tian Shi

Lijun Zhu

Mikhail Dolganov

Siu Kwan Cheung

Tao Li

Cho-Shuen Hsieh

Albert Huang

A driver circuit may include an optical emitter. The driver circuit may include a first switch that, in a closed state, is to cause charging of an inductive element, and when transitioning from the closed state to an open state is to cause discharging of the inductive element to charge a capacitive element. The driver circuit may include a second switch that in a closed state is to cause discharging of the capacitive element to provide an electrical pulse to the optical emitter. The driver circuit may include a signal generator configured to generate a first signal for controlling the open state and the closed state of the first switch, and a pulse shortening element configured to shorten a pulse width of the first signal to generate a second signal for controlling the open state and the closed state of the second switch.

Driver circuit for evaluation of an optical emitter

In some implementations, a probe tip assembly includes a driver printed circuit board assembly (PCBA) and a probe tip subassembly. The probe tip subassembly includes a plurality of probe tips, wherein a probe tip, of the plurality of probe tips, extends beyond an end of the PCBA, and the PCBA and the probe tip are configured to transmit an electric signal to test an optical component. The probe tip may include a material comprising at least one of copper (Cu), a beryllium copper (BeCu) alloy, tungsten (W), Paliney, Neyoro, and/or another conductive material.

Probe tip assembly for testing optical components

A wafer testing system may comprise a chuck, a wafer carrier, a cathode plate, and a probe card. The chuck may be configured to hold the wafer carrier. The wafer carrier may be configured to hold a wafer on a surface of the wafer carrier, wherein the surface of the wafer carrier comprises one or more contact features protruding from the surface of the wafer carrier. The cathode plate may be configured to provide an electrical connection between the wafer carrier and the probe card, wherein a portion of a surface of the cathode plate is configured to be disposed on the one or more contact features of the wafer carrier. The probe card may be configured to test, using one or more probes associated with the probe card, the wafer when the wafer is on the surface of the wafer carrier.

Wafer prober to facilitate testing of a wafer using nanosecond pulses

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Yuanzhen Zhuang