Micron Technology Incorporated

Yuanhang Cao

Luca De Santis

Walter Di Francesco

Ali Mohammadzadeh

Luca Nubile

Biagio Iorio

Fumin Gu

A memory device includes a plurality of memory dies, each memory die of the plurality of memory dies comprising a memory array and control logic. The control logic comprises a plurality of processing threads to execute memory access operations on the memory array concurrently, a thread selection component to identify one or more processing threads of the plurality of processing threads for a power management cycle of the associated memory die and a power management component to determine an amount of power associated with the one or more processing threads and request the amount of power during the power management cycle.

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Santa Clara, CA, United States of America

Yuanhang Cao