United Microelectronics Corp.

Yuang-Chang Lin

Wen-Jeng Lin

Kirk Hsu

Hsin-Tuei Hsu

The proposed invention is related to a method for forming a gate with metal silicide. In short, the proposed method comprises the following steps: providing a substrate; forming a first dielectric layer on the substrate; forming a polysilicon layer on the first dielectric layer; forming a metal silicide layer on the polysilicon layer; forming a second dielectric layer on the metal silicide layer; etching the second dielectric layer, the metal silicide layer, the polysilicon layer and the first dielectric layer to form a gate; performing a thermal nitridation process to form a metal nitride layer on the sidewall of the metal silicide layer; and performing a thermal oxidation process to eliminate edge defects.

Method for forming a gate with metal silicide

The present invention relates to a method of forming a self-aligned contact hole on a semiconductor wafer. The semiconductor wafer comprises a substrate, an array area and a periphery area. The array area comprises a first gate electrode and a second gate electrode adjacent to the first gate electrode. The periphery area comprises at least a third gate electrode. A first doped area is formed over each of two opposite sides of each gate electrode. A first spacer is formed on a wall of each of the two opposite sides of the third gate electrode in the periphery area. Then, a second spacer is formed on a wall of each of the two opposite sides of the first and second gate electrodes in the array area. The first spacers are thicker than the second spacers, and the second spacers between the first and second gate electrodes are internal walls of a self-aligned contact hole between the first and second gate electrodes.

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Feng-Yuan, Taiwan

Yuang-Chang Lin