Avary Holding (Shenzhen) Co., Limited.

Hongqisheng Precision Electronics (Qinhuangdao) Co., Ltd.

Yuan-Yu Lin

Chih-Chieh Fu

Ze-Jie Li

A method for manufacturing a fan-out chip packaging structure with decreased use of a crack-inducing hot-soldering process includes a first carrier plate with first and a second outer wiring layers. Two first conductive posts are formed on the first outer wiring layer, one end of each post is electrically connected to the first outer wiring layer. A receiving groove is formed between first conductive posts, and a sidewall of each post is surrounded by a first insulating layer. An embedded component is laid in the receiving groove and a second carrier plate is formed on the first insulating layer, wherein the second carrier plate carries third and fourth outer wiring layers. A first outer component is connected to the second outer wiring layer, and a second outer component is connected to the fourth outer wiring layer.

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Taipei, Taiwan

Yuan-Yu Lin