Pdf Solutions, Incorporated

Yuan Yu

Sharad Saxena

Meindert Martin Lunenborg

Tomasz Brozek

Mike Kyu Hyon Pak

Christopher Hess

Rakesh Vallishayee

Amit Joag

Hendrik Schneider

SiewHoon Ng

Jianjun Cheng

Thomas Brozek

Described are test structures and methods for measuring silicon thickness in fully depleted silicon-on-insulator technologies.

Test structures for measuring silicon thickness in fully depleted silicon-on-insulator technologies

An apparatus and method for testing two-terminal memory elements organized as a cross-point memory array. The apparatus allows functional testing of two-terminal memory elements organized as a cross-point memory array, and built in a short flow manufacturing process. The proposed apparatus substantially eliminates the use of any type of additional active or passive switches, selectors, or decoders. A large number of memory elements of various memory types including planar (two dimensional) or three dimensional memory structures can be tested without the need of manufacturing selectors or running the full flow process.

Passive array test structure for cross-point memory characterization

Methods of measuring fin height electrically for devices fabricated using FinFET technology are disclosed here. One method uses an interleaving comb-like test structure with no gate. The other method extracts fin height from total gate capacitance from FinFETS with varying gate lengths. When a comb-like structure with no gate is used to measure fin height, if there is another structure with a gate is used, then the gate capacitance may be measured to independently measure thickness of gate dielectric.

Test structures and method for electrical measurement of FinFET fin height

Disclosed are methods for measuring capacitance in presence of leakage in integrated circuits. In particular, it teaches a method of measuring leaky capacitors using charge based capacitance measurement (CBCM) technique taking into account parasitic resistance. Fast and accurate measurement of capacitances allows the estimation of a number of technology parameters like: gate-dielectric thickness, gate critical dimension, trench depth in a damascene metallization process, height of a fin in a Fin FET device etc.

Method for accurate measurement of leaky capacitors using charge based capacitance measurements

Test structures and methods for measuring silicon thickness in fully depleted silicon-on-insulator technologies

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Yuan Yu