Spin Memory, Inc.

Integrated Silicon Solution, (cayman) Inc.

Yuan-Tung Chin

Mustafa Pinarbasi

Elizabeth Ann Dobisz

Thomas D Boone

Pradeep Manandhar

Girish Jagtini

Prachi Shrivastava

Girish Jagtiani

Embodiments of the present invention include multiple independent terminals for a plurality of devices in a stack configuration within a semiconductor. In one embodiment, a semiconductor comprises: a first device at a first semiconductor level within a multi terminal device stack; wherein the first device is coupled to a first terminal; a second device at a second semiconductor level within the multi terminal device stack, wherein the second device is coupled to a second terminal; a third terminal is coupled to the second device and a fourth terminal is coupled to the first device, wherein the first terminal and second terminal are independently coupled to the first device and second device respectively. The first terminal, the second terminal, the third terminal and the fourth terminal couple components included in the multi terminal stack to components not included in the multi terminal stack.

Multi terminal device stack systems and methods

Embodiments of the present invention include multiple independent terminals for a plurality of devices in a stack configuration within a semiconductor. In one embodiment, a multi terminal fabrication process comprises: performing an initial pillar layer formation process to create layers of a multi terminal stack; forming a first device in the layers of the multi terminal stack; forming a second device in the layers of the multi terminal stack; and constructing a set of terminals comprising: a first terminal coupled to the first device, a second terminal coupled to the second device; and a third terminal coupled to the first device; wherein at least two terminals in the set of terminals are independent. The third terminal can be coupled to the second device.

Multi terminal device stack formation methods

Embodiments of the present invention include multiple independent terminals for a plurality of devices in a stack configuration within a semiconductor. In one embodiment, a semiconductor comprises: a first device at a first semiconductor level within a multi terminal device stack; wherein the first device is coupled to a first terminal; a second device at a second semiconductor level within the multi terminal device stack, wherein the second device is coupled to a second terminal; and a third terminal is coupled to the first device, wherein the first terminal and second terminal are independently coupled to the first device and second device respectively. The third terminal can be coupled to the second device. The first terminal, the second terminal, and third terminal and couple components included in the multi terminal stack to components not included in the multi terminal stack.

A method for forming self aligned magnetic memory element pillars for Magnetic Random Access Memory. The method allows the magnetic memory element pillars to be arranged in staggered rows of memory elements at a pitch that is smaller than what is possible using photolithography alone. The method involves forming a spacer mask in the form of an array of connected rings arranged in a square pattern of non-staggered rows. A sacrificial mask material is deposited over the spacer mask and the spacer mask is then removed, leaving sacrificial mask material in the holes at the center of the rings and also in the spaces between the rings. A reactive ion processes is then performed to transfer the pattern of the sacrificial mask onto underlying hard mask layers. A material removal process can then be performed to define a plurality of memory element pillars.

Method for manufacturing reduced pitch magnetic random access memory pillar

A method for manufacturing magnetic random access memory. The method allows very high density magnetic memory elements to be formed on a magnetic memory chip. A magnetic memory element material is deposited and a diamond like carbon (DLC) hard mask is formed over the magnetic memory element material. An ion or atom bombardment process such as ion milling is performed to remove portions of the magnetic memory element material that are not protected by the hard mask to form a plurality of magnetic memory element pillars. Because the diamond like carbon hard mask is resistant to the material removal processes such as ion milling, it can be made very thin (10-20 nm), which reduces shadowing while still allowing a process such as ion milling to be used to define the magnetic data element pillars. This advantageously allows the pillars to be formed with well defined, vertical sidewalls, and avoiding shorting.

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Fremont, CA, United States of America

Yuan-Tung Chin