Taiwan Semiconductor Manufacturing Comp. Ltd.

TSMC China Company Limited

Baoshan Iron & Steel Co., Ltd.

TSMC Nanjing Company, Limited

Yuan Ma

Li-Chun Tien

XinYong Wang

Qiquan Wang

Jianping Zhang

Xin-Yong Wang

Yigang Dai

Shuangcheng Wang

Lan Zhu

Yuling Ren

Ke-Liang Shang

Wenqi Fang

Jiayun Yang

A method includes steps of dividing a first arrangement of metal lines in a circuit layout into two sets of metal lines, a first set of metal lines in a peripheral area, and a second set of metal lines in a center area. The arrangement of metal lines is configured to electrically connect to contacts of a second layer of the circuit layout. The method includes adjusting a metal line perimeter of at least one metal line in the center area to make a second arrangement of metal lines, where each adjusted metal line perimeter is separated from contacts in the second layer of the integrated circuit layout by at least a check distance.

Integrated circuit with constrained metal line arrangement

A memory device includes a first plurality of program lines of a first group, a second plurality of program lines of a second group, and a plurality of address lines. The second plurality of program lines are disposed next to and are parallel to the first plurality of program lines. The plurality of address lines are coupled to the first plurality of program lines and the second plurality of program lines respectively. The plurality of address lines are twisted and are intersected with the first plurality of program lines and the second plurality of program lines in a layout view. At least two adjacent program lines of the first plurality of program lines or the second plurality of program lines have lengths different from each other. A method is also disclosed herein.

Memory device

A method includes steps of dividing a first arrangement of metal lines in a circuit layout into two sets of metal lines, a first set of metal lines in a peripheral area, and a second set of metal lines in a center area. The arrangement of metal lines is configured to electrically connect to contacts of a second layer of the circuit layout. The method includes adjusting a metal line perimeter of at least one metal line in the center area to make a second arrangement of metal lines, where each adjusted metal line perimeter is separated from contacts in the second layer of the integrated circuit layout by at least a check distance. Metal line material is deposited into a set of openings in a dielectric layer of the integrated circuit, the set of openings corresponding to the second arrangement of metal lines.

Disclosed is an aluminium-zinc hot-plated steel plate having excellent weather resistance, corrosion resistance and alkali resistance, and an environmental-friendly surface treating agent therefor, wherein after the surface treatment of the aluminium-zinc hot-plated steel plate using an environmental-friendly surface treating agent consisting of the components of a matrix resin compounded from a particular solvent-free aqueous aliphatic polyurethane dispersion and aqueous polyurethane-acrylic acid copolymer, an organic silicon compound, a matrix resin curing agent, a water-soluble metal salt compound and a high-density polyethylene lubrication auxiliary etc., the formed surface-treated aluminium-zinc hot-plated steel plate has comprehensive properties of excellent weather resistance, corrosion resistance and alkali resistance, and good machine formability etc.

Aluminium-zinc hot-plated steel plate having excellent weather resistance, corrosion resistance and alkali resistance, and manufacturing method and surface treating agent therefor

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Shanghai, China

Yuan Ma