Mediatek Corporation

Sunplus Technology Co., Ltd.

Yuan-Hung Chung

Hong-Kai Hsu

Yuan-Fu Chung

Hsien-Chyi Chiou

Chu-Wei Hu

Wei Huang Wang

Yi-Shing Shih

Tung-Hsing Lee

Tien-Chang Chang

Bo-Shih Huang

Tsung-Ming Chen

Shu-Ping Shiu

Jie-Wei Lai

Wen-Ying Chien

I-Lin Hsieh

Jwo-An Lin

Yipin Wu

Chien-Kai Huang

Chia-hsin Wu

Shou-tsung Wang

Chin-Wei Huang

Tsung-Ying Tsai

Jiunn-Nan Hwang

Ren-yuh Liang

Ming-Yeh Hsu

Ren-Yuh Liang

The present invention provides a semiconductor capacitor structure. The semiconductor capacitor structure comprises a first metal layer, a second metal layer and a first dielectric layer. The first metal layer is arranged to be a part of a first electrode of the semiconductor capacitor structure, and the first metal layer comprises a first portion and a second portion. The first portion is formed to have a first pattern, and the second portion is connected to the first portion. The second metal layer is arranged to be a part of a second electrode of the semiconductor capacitor structure, and the first dielectric layer is formed between the first metal layer and the second metal layer.

Semiconductor capacitor structure for high voltage sustain

An integrated circuit includes a first polysilicon region having a first grain size formed on a substrate. The integrated circuit also includes a second polysilicon region, having a second grain size different from the first grain size, formed on the substrate. The first polysilicon region is doped with a first dopant of a first conductive type and a second dopant selected from elements of group IIIA and group IVA which has an atomic weight heavier than that of silicon.

Integrated circuits and fabrication methods thereof

A digital circuit comprises a plurality of functional circuits and a finite state machine. Each functional circuit comprises a digital macro, a resistance control device and at least one device with capacitance. The digital macro is coupled to a ground. The resistance control device is electrically connected between the digital macro and an always-on power mesh. The at least one device with capacitance is electrically connected between the resistance control device and the ground. The finite state machine is electrically connected to the resistance control device, and is configured to adjust the resistance of the resistance control device.

Digital circuit

A method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.

A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.

Frequency selective circuit

A system for the coexistence between a plurality of wireless communication modules sharing a single antenna includes an antenna, first and second transceiving paths, and first and second wireless communications modules. The first wireless communications module is coupled to a first transceiving path and transmits or receives first wireless signals via the first transceiving path. The second wireless communications module is coupled to the second transceiving path and transmits and receives second wireless signals via the first and the second transceiving paths, wherein signal strengths of the second wireless signals passing through the second transceiving path are attenuated by a certain level, and the attenuated second wireless signals are added to the first wireless signals when passing through the first transceiving path, wherein one of the first and the second communications module is a LTE module and the other one is a WLAN module.

System for the coexistence between a plurality of wireless communications modules sharing single antenna

An integrated circuit includes a first polysilicon region having a first grain size formed on a substrate. The integrated circuit also includes a second polysilicon region, having a second grain size different from the first grain size, formed on the substrate. Furthermore, a method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.

An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes an impedance device coupled between a pad and a power line and a clamp unit coupled between the pad and a ground line.

ESD protection circuit

An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes an impedance device coupled between a pad and a power line and a clamp unit coupled between the pad and a ground line, wherein no ESD current flows through the impedance device when an ESD event occurs at the pad.

A system for the coexistence between a plurality of wireless communications modules sharing single antenna is provided. A wireless communications chipset includes a first wireless communications module configured to transmit or receive first wireless communications signals, and a second wireless communications module configured to transmit or receive second wireless communications signals. A path selection circuit is configured to connect the first wireless communications module to the antenna via a first transceiving path or a second transceiving path for transmitting and receiving the first wireless signals according to transceiving statuses of the first wireless signals and the second wireless signals.

Systems and methods for coexistence between plurality of wireless communications modules sharing single antenna

A system for the coexistence between a plurality of wireless communication modules sharing a single antenna is provided, including an antenna, first and second transceiving paths, and first and second wireless communications modules. The first transceiving path is coupled to the antenna. The second transceiving path is coupled to the first transceiving path. The first wireless communications module is coupled to the first transceiving path and transmits or receives a plurality of first wireless signals. The second wireless communications module is coupled to the second transceiving path and transmits or receives a plurality of second wireless signals, wherein signal strengths of the second wireless signals passing through the second transceiving path are attenuated by a certain level, and the attenuated second wireless signals are added to the first wireless signals when passing through the first transceiving path.

System for the coexistence between a plurality of wireless communication module sharing single antenna

A signal processing circuit with noise cancellation includes an impedance matching unit and a transconductance stage. The impedance matching unit is disposed at a first path, and arranged to provide input impedance matching, wherein the impedance matching unit is a passive element, and the first path is coupled between a signal input port and a signal output port. The transconductance stage is disposed at a second path, and arranged to guide circuit introduced noise to the signal output port for noise cancellation at the signal output port, wherein the second path is coupled between the signal input port and the signal output port.

Signal processing circuit with circuit induced noise cancellation

An amplifier is provided. The amplifier includes a pair of first input transistors, a first load, and a first canceling circuit. The pair of first input transistors is coupled between a pair of first differential nodes and a reference voltage source, for receiving a pair of input signals. The first load is coupled to the pair of first differential nodes and a pair of differential output terminals of the amplifier. The first canceling circuit is coupled between the first differential nodes. The canceling circuit is capable of balancing voltages, respectively, at the first differential nodes when the amplifier is turned off.

Amplifiers and transceiver devices using the same

A signal processing circuit with noise cancellation includes an impedance matching unit and a transconductance stage. The impedance matching unit is disposed at a first path, and arranged to provide input impedance matching, wherein the impedance matching unit is a bilateral element, and the first path is coupled between a signal input port and a signal output port. The transconductance stage is disposed at a second path, and arranged to guide circuit introduced noise to the signal output port for noise cancellation at the signal output port, wherein the second path is coupled between the signal input port and the signal output port.

A system for the coexistence between wireless communication modules sharing an antenna is disclosed. A wireless communication chipset includes a first wireless communication module capable of transmitting and receiving first wireless communication signals, a second wireless communication module capable of transmitting and receiving second wireless communication signals and a combine-separate unit capable of generating a first combined signal and separating a second combined signal. The switching device is configured to selectively transmit the first combined signal or receive the second combined signal. The connection device has a first port coupled to an antenna, a second port connected to the first port for transmitting the first combined signal or receiving the second combined signal, and a third port connected to the first port for transmitting or receiving the second wireless communication signals via the second path and the antenna.

Growing community of inventors

Hsinchu County, Taiwan

Yuan-Hung Chung