Cvitek Co. Ltd.

Shenzhen Suanhai Technology Co. Ltd.

Yuan-Hsiang Kuo

Wei-Chun Chang

Chia-Lin Lu

Jen-Shi Wu

Hao-Cing Jhou

Tsung-Hsien Lin

Hsueh-Chien Lu

A computing device for floating-point mathematic operation using look-up table is provided. The computing device includes: a bit arrangement unit used for receiving a floating-point input data and performing a bit arrangement or a format conversion on the floating-point input data to generate multiple index blocks; a first look-up table unit group used for receiving the index blocks and performing look-up operation using the index blocks as index to generate a plurality of look-up table results; and an operation unit used for performing operation on the look-up table results of the first look-up table unit group to generate an operation output.

Computing method and computing device for floating-point mathematic operation using lookup table

A hardware accelerator is provided. The hardware accelerator includes a first memory; a source address generation unit coupled to the first memory; a data collection unit coupled to the first memory; a first data queue coupled to the data collection unit; a data dispersion unit coupled to the first data queue; a destination address generation unit coupled to the data dispersion unit; an address queue coupled to the destination address generation unit; a second data queue coupled to the data dispersion unit; and a second memory coupled to the second data queue. The hardware accelerator can perform anyone or any combination of tensor stride, tensor reshape and tensor transpose to achieve tensorflow depth-to-space permutation or tensorflow space-to-depth permutation.

Hardware accelerator

Growing community of inventors

Hsinchu, Taiwan

Yuan-Hsiang Kuo