Siliconware Precision Industries Co., Ltd.

Yuan-Fu Lin

Wen-Ta Tsai

Water Tsai

A delamination-preventing substrate and a semiconductor package with the substrate are provided. A metal layer and a solder mask layer are sequentially laminated on a chip attach area of a substrate, and both formed with corresponding openings for partly exposing the substrate. This allows an adhesive for chip-bonding use to be directly attached to the substrate via the openings, so as to reduce contact area between the adhesive and the metal layer, and to increase bonding between the substrate and a chip mounted on the substrate by means of the adhesive. Direct contact between the adhesive and the substrate also helps reduce stress generated between the chip and substrate, thereby preventing stress-induced delamination. Due to weak adhesion between adhesive and metal materials, reduced contact area between the adhesive and the metal layer would further enhance bonding of the chip to the substrate, thereby assuring quality of fabricated package products.

Delamination-preventing substrate and semiconductor package with the same

A semiconductor package and a method for fabricating the same are proposed, in which a chip is attached to a die pad formed with an opening in a manner that the chip covers the opening and a surface of the chip is partially exposed to the opening. A covering layer is formed on the exposed surface of the chip, so as to fill a gap formed between the chip and the die pad in proximity to the opening, and allow air in the gap to be dissipated. This makes an encapsulant formed for encapsulating the chip and the die pad with no void formed therein, so that no die crack or popcorn effect occurs in the fabricated product, and thus quality and reliability of the semiconductor package can be assured.

Growing community of inventors

Taichung, Taiwan

Yuan-Fu Lin