United Microelectronics Corp.

Other

Yuan-Chi Pai

Wei-Chiang Lin

Chun-Chi Yu

En-Chiuan Liou

Teng-Chin Kuo

Shui-Yen Lu

Shin-Chi Chen

Chih-Yueh Li

Yi-Ting Chen

Hung-Yi Wu

Tuan-Yen Yu

Lung-Yi Cheng

Cheng-Che Li

Yu-Cheng Tung

Chi-Mao Hsu

Cheng-Han Wu

Nien-Ting Ho

Chia-Chang Hsu

Chien-Hao Chen

Chia-Hung Wang

Sho-Shen Lee

Chang-Mao Wang

Yu-Wei Cheng

Wei-Chang Lin

Fong-Lung Chuang

Yong-Fa Huang

Yu-Hong Kuo

Yi-Chih Chiang

Hua-Jen Cheng

An asymmetry compensation method used in a lithography overlay process and including steps of: providing a first substrate, wherein a circuit layout is disposed on the first substrate, a first mask layer and a second mask layer together having an x-axis allowable deviation range and an y-axis allowable deviation range relative to the circuit layout are stacked sequentially on the circuit layout, wherein the x-axis allowable deviation range is unequal to the y-axis allowable deviation range; and calculating an x-axis final compensation parameter and an y-axis final compensation parameter base on the unequal x-axis allowable deviation range and the y-axis allowable deviation range.

Asymmetry compensation method used in lithography overlay process

The present invention provides a photo-mask for manufacturing structures on a semiconductor substrate, which comprises a photo-mask substrate, a first pattern, a second pattern and a forbidden pattern. A first active region, a second active region are defined on the photo-mask substrate, and a region other than the first active region and the second active region are defined as a forbidden region. The first pattern is disposed in the first active region and corresponds to a first structure on the semiconductor substrate. The second pattern is disposed in the second active region and corresponds to a second structure on the semiconductor substrate. The forbidden pattern is disposed in the forbidden region, wherein the forbidden pattern has a dimension beyond resolution capability of photolithography and is not used to form any corresponding structure on the semiconductor substrate. The present invention further provides a method of manufacturing semiconductor structures.

Photo-mask and method of manufacturing semiconductor structures by using the same

A method of correcting an overlay error includes the following steps. First, an overlay mark disposed on a substrate is captured so as to generate overlay mark information. The overlay mark includes at least a pair of first mark patterns and at least a second mark pattern above the first mark patterns. Then, the overlay mark information is calculated to generate an offset value between two first mark patterns and to generate a shift value between the second mark pattern and one of the first mark patterns. Finally, the offset value is used to compensate the shift value so as to generate an amended shift value.

Method of correcting overlay error

A method of manufacturing a semiconductor device is provided. The method includes the following steps. A substrate including a first transistor having a first conductivity type, a second transistor having a second conductivity type and a third transistor having the first conductivity type is formed. An inner-layer dielectric layer is formed on the substrate, and includes a first gate trench corresponding to the first transistor, a second gate trench corresponding to the second transistor and a third gate trench corresponding to the third transistor. A work function metal layer is formed on the inner-layer dielectric layer. An anti-reflective layer is coated on the work function metal layer. The anti-reflective layer on the second transistor and on the top portion of the third gate trench is removed to expose the work function metal layer. The exposed work function metal layer is removed.

Method of manufacturing semiconductor device having gate metal

A method for manufacturing a semiconductor device is provided. A substrate having a first gate and a second gate respectively formed in a first region and a second region is provided. An underlayer is formed on the substrate to cover the first gate in the first region and the second gate in the second region. A patterned mask with a predetermined thickness is formed on the underlayer in the first region. The underlayer corresponding to the second gate in the second region is removed by the patterned mask to expose the second gate, wherein the underlayer corresponding to the first gate in the first region is partially consumed to expose part of the first gate.

Method for manufacturing semiconductor device

A photoresist removal method is described. A substrate having thereon a positive photoresist layer to be removed is provided. The positive photoresist layer is UV-exposed without using a photomask. A development liquid is used to remove the UV-exposed positive photoresist layer. The substrate as provided may further have thereon a sacrificial masking layer under the positive photoresist layer. The sacrificial masking layer is removed after the UV-exposed positive photoresist layer is removed.

Photoresist removal method and patterning process utilizing the same

An overlay mark is described, including N (N&#x2267;2) groups of first x-directional linear patterns each defined from a different one of N pre-layers, N groups of second x-directional linear patterns of a current layer, N groups of first y-directional linear patterns each defined from a different one of the N pre-layers, and N groups of second y-directional linear patterns of the current layer. Each group of second x-directional linear patterns is disposed together with one group of first x-directional linear patterns, wherein the second linear patterns and the x-directional linear patterns are arranged alternately. Each group of second y-directional linear patterns is disposed together with one group of first y-directional linear patterns, wherein the second linear patterns and the first linear patterns are arranged alternately.

Overlay mark for multiple pre-layers and currently layer

A method of forming assist feature patterns includes providing an original layout pattern having at least a first region defined therein, the first region having a first light transmission rate larger than 0%; performing a search step to the original layout pattern to define at least a second region having a second light transmission rate equal to 0% in the original layout pattern; forming a plurality of assist features in the second region to increase the second light transmission rate to larger than 0%; and outputting the original layout pattern and the assist features to a reticle blank.

Method of forming assist feature patterns

A method for forming photoresist patterns includes providing a substrate, forming a bi-layered photoresist on the substrate, and performing a photolithography process to pattern the bi-layered photoresist. The bi-layered photoresist includes a first photoresist layer and a second photoresist layer positioned between the first photoresist layer and the substrate. The first photoresist layer has a first refraction index and the second photoresist layer has a second refraction index, and the second refraction index is larger than the first refraction index.

Method for forming photoresist patterns

A process for removing photoresist material without any residues left and damage to the in-process substrate is described. The present process for removing photoresist on an in-process substrate comprises the steps of providing a cover layer which is to be etched on the in-process substrate and providing a layer of photoresist material thereon. The photoresist layer is patterned, exposed and developed. Then, the developed photoresist layer is further exposed without using a mask. The cover layer is etched with the use of the patterned photoresist layer. After etching, the photoresist material is removed by a solvent.

Process for removing photoresist material

An improved focusing and color-filtering structure is provided for use in a semiconductor light-sensitive device, such as CMOS (complementary metal-oxide semiconductor) light-sensitive device, that can be used, for example, on a digital camera or a PC camera to convert photographed image directly into digital form. The focusing and color-filtering structure is used for the focusing and color-filtering of the light incident thereon prior to the light being detected by the light-sensitive device. The focusing and color-filtering structure is characterized in the forming of a dummy pattern layer in the non-filter area surrounding the array of color-filter layers, which allows the subsequently formed planarization layer to be highly planaized with a substantially uniformly flat top surface without having slopes such that the subsequently formed microlenses can all be disposed upright in position without being slanted. The focusing and color-filtering structure has the benefit of allowing the quality of the photographed image to be more assured without being degraded by the ambient scatting light as in the prior art.

Focusing and color-filtering structure for semiconductor light-sensitive device

A reworking method to remove color filter film from a complementary metal-oxide semiconductor (CMOS) image sensor. In this method, the color filter film, including a planar film and a color film, is formed after the passivation of a CMOS device. Whether the color filter film is pre-baked or not, the reworking method of the invention is suitable. The method includes a plasma process, a solvent process, and a plasma process, which are sequentially performed.

Processing flow of a complementary metal-oxide semiconductor color filter

A method of fabricating a complementary metal-oxide-semiconductor (CMOS) photosensitive device. In this method, a wafer substrate is provided. Then, a first passivation layer is formed over the wafer substrate. The first passivation layer, which is made from a material that includes silicon nitride or silicon oxide, is heated so that it melts. Then, color filters including a red filter region, a green filter region and a blue filter region are formed over the first passivation layer. The color filters are used to filter out different colors of monochromatic light. The color filters are made from a material that includes acrylic. Subsequently, a second passivation layer having a planar top surface is formed over the color filters. The second passivation layer is made from a material that includes silicon nitride or silicon oxide. Next, photolithographic and etching operations are carried out to form an opening through the second passivation layer and the first passivation layer. This opening exposes the substrate wafer. Finally, a micro-lens layer is formed over the second passivation layer such that an individual micro-lens is positioned above each color filter.

Method of manufacturing complementary metal-oxide-semiconductor photosensitive device

A planarized layer is formed on the substrate, and an opening is formed. A microlens resist layer is formed over the planarized layer, wherein the microlens resist layer has a bigger thickness in the opening than on the planarized layer. A first photoresist layer is formed on the microlens layer. The first photoresist layer has a pattern align to the color filter. A first exposure step is performed at least onto the microlens layer to form a first exposed portion, using the first photoresist layer as a mask, and the first photoresist layer is removed. A second photoresist layer is performed on the microlens resist layer. The second photoresist layer has a pattern align to the opening. A second exposure step is performed at least onto the microlens layer to form a second exposed portion, using the second photoresist layer as a mask, and the second photoresist layer is removed. A positive development step is performed to remove the first exposed portion and the second exposed portion of the microlens resist layer and to form a plurality of microlens blocks align to the color filter. An after-development-exposure step and a curing step are performed so that each of the microlens blocks forms a microlens. The microlens has a substantially rounded semi-circle structure.

Method of fabricating a complementary metal-oxide semiconductor sensor device

A method for in-situ removing photoresist material. An etching process for patterning a passivation layer of a CMOS photosensor is performed on an etching machine. Oxygen is in-situ used to remove the parched photoresist material. The etching process and the in-situ O,process are performed, for example, on a Tegal-903 etching machine. The Tegal-903 has better stability than an Asher etching machine for removing the parched photoresist material using oxygen plasma. A stable etching rate is thus obtained to prevent the acrylic material layer from being damaged by over-etching and to prevent the photoresist material from remaining.

Growing community of inventors

Tainan, Taiwan

Yuan-Chi Pai