Taiwan Semiconductor Manufacturing Comp. Ltd.

Yuan-Bang Lee

Sheng-Liang Pan

Tzu-Yang Wu

Chia-Hung Kao

Sheng-Chieh Liu

Yuen-Sheng Hua

Chi-Shen Yang

Ming-Zhe Chiang

Disclosed is a method and a system for wafer backside alignment. A zero mark patterning on front side of a substrate. A plurality of layers are deposited on the front side of the substrate. The wafer is flipped over with backside of the substrate facing up, and a through wafer etching is performed from the backside to an etch stop layer deposited over the front side of the substrate.

Method and system for wafer backside alignment

An interlocking lid which is suitable for a wet bench tank used in the processing of semiconductor wafer substrates. The interlocking lid includes a pair of lid panels typically provided with a clasp having elements for engaging and interlocking with each other when the lid panels are in a closed position. At least one of the lids may further include a beveled lid shoulder which facilitates runoff of liquids from and hinders pooling of liquids on the exterior surface of the lid.

Interlocking lid for wet bench

Growing community of inventors

Miaoli County, Taiwan

Yuan-Bang Lee