Taiwan Semiconductor Manufacturing Comp. Ltd.

Yu-Tse Su

Ming-Da Cheng

Chen-Shien Chen

Ming-Chih Yew

Hsiu-Jen Lin

Sey-Ping Sun

Yi-Jen Lai

Yang-Che Chen

Ching-Wen Hsiao

Hong-Seng Shue

Po-Hao Tsai

Yao-Chun Chuang

Ting-Li Yang

An organic interposer includes interconnect-level dielectric material layers embedding redistribution interconnect structures, package-side bump structures located on a first side of the interconnect-level dielectric material layers, at least one dielectric capping layer located on a second side of the interconnect-level dielectric material layers, a bonding-level dielectric layer located on the at least one dielectric capping layer, metallic pad structures including pad via portions embedded in the at least one dielectric capping layer and pad plate portions embedded in the bonding-level dielectric layer, and an edge seal ring structure vertically extending from a first horizontal plane including bonding surfaces of the package-side bump structures to a second horizontal plane including distal planar surfaces of the metallic pad structures. The edge seal ring structure may include a vertical stack of metallic ring structures that are free of aluminum and laterally surround the package-side bump structures and the redistribution interconnect structures.

Interposer including a copper edge seal ring structure and methods of forming the same

A chip structure is provided. The chip structure includes a substrate. The chip structure includes a conductive line over the substrate. The chip structure includes a first passivation layer over the substrate and the conductive line. The chip structure includes a conductive pad over the first passivation layer covering the conductive line. The conductive pad is thicker and wider than the conductive line. The chip structure includes a first conductive via structure and a second conductive via structure passing through the first passivation layer and directly connected between the conductive pad and the conductive line. The chip structure includes a conductive pillar over the conductive pad.

Chip structure with conductive via structure and method for forming the same

A method for manufacturing a semiconductor package includes following operations. A die having a first surface and a second surface opposite to the first surface is provided. A polymeric film is disposed over the second surface of the die. An adhesive film is provided. The die and the polymeric film are attached to a carrier substrate through the adhesive film. The die, the polymeric film and the adhesive film are molded with a molding compound. The polymeric film is sandwiched between the die and the adhesive film upon attaching to the carrier substrate.

Method for manufacturing semiconductor package for warpage control

An embodiment package includes a first package. The first package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, and redistribution layers over the encapsulant and the first integrated circuit die. The package also includes a second package bonded to the first package by a plurality of functional connectors. The functional connectors and the redistribution layers electrically connect a second integrated circuit die of the second package to the first integrated circuit die. The package also includes a plurality of dummy connectors disposed between the first package and the second package. One end of each of the plurality of dummy connectors facing the first package is physically separated from the first package.

Semiconductor packages having dummy connectors and methods of forming same

A semiconductor package includes a die including a first surface and a second surface opposite to the first surface, a warpage control unit disposed over the second surface of the die and entirely overlapping the second surface of the die, and a molding compound surrounding the die and the warpage control unit. The warpage control unit includes an adhesive portion disposed over the second surface of the die and a warpage adjustable portion sandwiched between the adhesive portion and the die.

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Chiayi, Taiwan

Yu-Tse Su