Silicon Laboratories Inc.

Yu Su

Mustafa H Koroglu

Ramin Khoini-Poorfard

Ruifeng Sun

Krishna Pentakota

Vitor Pereira

Pio Balmelli

Luigi Panseri

Abdulkerim Coban

Abhishek Kammula

Ramin Khoini Poorfard

A bias circuit for a low noise amplifier of a front end interface of a radio frequency communication device including a bias generator providing a bias voltage on a bias node for the low noise amplifier, a first resistive device coupled between the bias node and an input of the low noise amplifier, a first switch coupled in parallel with the first resistive device, and mode control circuitry receiving a mode signal indicative of a mode change, in which the mode control circuitry, in response to a mode change, momentarily activates the first switch to bypass the first resistive device and momentarily increases current capacity of the bias generator. The mode control circuitry may also momentarily activate a second switch to bypass a second resistive device of the bias circuit. The mode control circuitry may increase a sink current of the bias generator in response to the mode change.

Bias circuit for a low noise amplifier of a front end interface of a radio frequency communication device that enables fast transitions between different operating modes

In one embodiment, an apparatus includes: a digital baseband circuit to receive a digital baseband signal and output a first digital baseband signal and a second digital baseband signal, the second digital baseband signal comprising a scaled version of the first digital baseband signal; a first transmitter signal path coupled to the digital baseband circuit to process the first digital baseband signal and output a first radio frequency (RF) signal; a second transmitter signal path coupled to the digital baseband circuit to process the second digital baseband signal and output a second RF signal; a first power amplifier coupled to the first transmitter signal path to amplify the first RF signal and output an amplified first RF signal; and a second power amplifier coupled to the second transmitter signal path to amplify the second RF signal and output an amplified second RF signal.

Low power, efficient doherty power amplifier

In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.

Multi-standard, multi-channel expandable TV/satellite receiver

A receiver includes a first amplifier having an input for receiving a radio frequency (RF) signal, and an output for providing an amplified RF signal, a switch section for selectively switching the RF signal onto one of a plurality of nodes, and a filter section comprising a plurality of filters coupled to respective ones of the plurality of nodes. A first filter of the plurality of filters comprises a first variable capacitor coupled in parallel with an inductance leg between a corresponding one of the plurality of nodes and a power supply voltage terminal, wherein the first variable capacitor has a capacitance that varies in response to a tuning signal, and the inductance leg comprises a first inductor in series with an effective resistance, wherein the effective resistance has a value related to an upper cutoff frequency to be tuned by the first filter.

Low-cost receiver using integrated inductors

Techniques relating to buffer circuits. In one embodiment, a circuit includes a first transistor configured as a source follower and a feed-forward path coupled to the gate terminal of the first transistor and the drain terminal of the first transistor. In this embodiment, the feed-forward path includes circuitry configured to decouple the feed-forward path from a DC component of an input signal to the gate terminal of the first transistor. In this embodiment, the circuitry is configured to reduce a drain-source voltage of the first transistor based on the input signal. In some embodiment, the feed-forward path includes a second transistor configured as a source follower and the source terminal of the second transistor is coupled to the drain terminal of the first transistor. In various embodiments, reducing the drain-source voltage may improve linearity of the first transistor.

Highly linear buffer

A receiver includes a first amplifier having an input for receiving an RF signal, and an output for providing an amplified RF signal, a switch section that selectively switches the amplified RF signal onto a selected one of a plurality of nodes, and a filter section comprising a plurality of filters coupled to respective ones of the plurality of nodes. A first filter of the plurality of filters comprises a first variable capacitor coupled in parallel with an inductance leg between a corresponding one of the plurality of nodes and a power supply voltage terminal. The first variable capacitor has a capacitance that varies in response to a tuning signal. The inductance leg includes a first inductor in series with an effective resistance, wherein the effective resistance has a value related to an upper cutoff frequency to be tuned by the first filter.

An amplifier includes a negative gain amplifier, a load element, and a transconductance device. The negative gain amplifier has an input and an output. The load element has a first terminal coupled to a power supply voltage terminal, and a second terminal. The transconductance device has a first current electrode coupled to the second terminal of the load element, a control electrode coupled to the output of the negative gain amplifier, and a second current electrode coupled to the input of the negative gain amplifier.

Amplifier for television tuner chip and method therefor

A receiver includes a first amplifier, a first variable capacitor, and an inductance leg. The first amplifier has an input for receiving a radio frequency signal, and an output. The first variable capacitor has a first terminal coupled to the output of the first amplifier, a second terminal coupled to a power supply voltage terminal, and a control terminal for receiving a tuning signal. The inductance leg has a first terminal coupled to the output of the first amplifier, and a second terminal coupled to the power supply voltage terminal. The inductance leg includes a first inductor and has an effective resistance in series with the first inductor, wherein the effective resistance has a value related to an upper frequency threshold to be tuned by the receiver.

A receiver includes a low noise amplifier having an input for receiving a radio frequency signal, and an output. The receiver further includes a tracking filter having an input coupled to the output of the low noise amplifier. The tracking filter including a bandpass filter configured to pass the radio frequency signals. The bandpass filter includes a variable capacitor having a first electrode coupled to the input of the tracking filter for receiving the radio frequency signals, and a second electrode coupled to a power supply terminal. The bandpass filter further includes a transformer having a primary winding including a first terminal coupled to the first electrode of the variable capacitor and a second terminal coupled to a second power supply terminal. The transformer further includes a secondary winding.

Receiver including a tracking filter

A low noise amplifier (LNA) for use in a receiver circuit includes an adjustable impedance network including an input for receiving a radio frequency signal, a plurality of control inputs, and an output. The LNA further includes a controller coupled to the plurality of control inputs and configured to control an impedance of the adjustable impedance network. The controller controls the adjustable impedance network to provide a relatively low impedance in a terrestrial mode and to provide a relatively high impedance in a cable mode.

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Austin, TX, United States of America

Yu Su