Lg Display Co., Ltd.

Yu Ri Shim

Jae Chang Kwon

Chang Yeop Shin

Chung Wan Oh

Min Bo Kim

Dong Eok Kim

Jae Seok Lee

An array substrate of a liquid crystal display device and a method of fabricating the array substrate. A gate electrode of a thin film transistor of the array substrate is formed. The gate electrode has an edge region surrounding an interior region of the gate electrode and the edge region of the gate electrode is thicker than the interior region of the gate electrode. A semiconductor layer is formed over the gate electrode. A source electrode and a drain electrode of the thin film transistor are formed that define a channel region in the semiconductor layer. The channel region is located over the interior region of the gate electrode. Additionally, the gate electrode may be formed with a half-tone mask that results in the edge region of the gate electrode being thicker than the interior region of the gate electrode.

Method of fabricating array substrate of liquid crystal display device

Array substrate of liquid crystal display device

A thin film transistor array substrate is disclosed. The thin film transistor array substrate includes: gate lines and data lines formed to cross each other in the center of a gate insulation film on a substrate and to define pixel regions; a thin film transistor formed at each intersection of the gate and data lines; a passivation film formed on the thin film transistors; a pixel electrode formed on each of the pixel regions and connected to the thin film transistor through the passivation film; a gate pad connected to each of the gate lines through a gate linker; and a data pad connected to each of the data lines through a data linker. The data pad is formed of a gate pattern, and the data line is formed of a data pattern. The data linker is configured to connect the data pad formed of the gate pattern with the data line formed of the data pattern using a connection wiring. Also, the data linker includes the gate pattern connected to the data pad, the data pattern formed opposite to the gate pattern in the center of the gate insulation film, and the connection wiring configured to connect the gate pattern with the data pattern through a first contact hole which exposes the data pattern and the gate pattern by penetrating through the passivation film and the gate insulation film.

Thin film transistor array substrate and manufacturing method thereof

Growing community of inventors

Gumi-si, South Korea

Yu Ri Shim