Realtek Semiconductor Inc.

Aiconnx Technology Corporation

Yu-Pin Lin

Lien-Hsiang Sung

Hsu-Jung Tung

Jin-Sheng Gong

Po-Hsien Wu

Tien-Hung Lin

Wei-Liang Cheng

Wei-Lun Weng

An integrated circuit self-repair method and an integrated circuit thereof are provided. The integrated circuit self-repair method includes: transmitting, by a main register, a predetermined logic state to at least three registers, and setting the at least three registers to the predetermined logic state; outputting, according to the predetermined logic state in the at least three registers, the predetermined logic state to drive a controlled circuit to perform a function; and when a minority of the at least three registers are changed to an opposite logic state due to an emergency occurring at an input power source, outputting the predetermined logic state according to the predetermined logic state of the remaining registers, and transmitting the predetermined logic state back to the register that is in the opposite logic state, to correct the opposite logic state to the predetermined logic state.

Integrated circuit self-repair method and integrated circuit thereof

The electronic device with power-off partition includes a signal transmitting module, two repeater modules, and a working module. Each of the repeater modules includes a first power domain, a second power domain, and a transceiver circuit. A transmission path between the first power domain and the second power domain is maintained at a logic state when the second power domain is in power off mode. The transceiver circuit of one of the two repeater modules encodes a standby signal obtained from the signal transmitting module and transmits an encoded standby signal. The transceiver circuit of the other of the repeater modules decodes the encoded standby signal and transmits a decoded standby signal. The working module transmits, according to the decoded standby signal, a power-off signal to the transceiver circuits of the two repeater modules, so that the second power domains enter the power-off mode in response to the power-off signal.

Electronic device with power-off partition and partition-based power-off method therefor

A video processing method for a video processing circuit includes receiving a first video source corresponding to a first pixel rate and a second video source corresponding to a second pixel rate, wherein a processing data rate of a video processing path is greater than or equal to a sum of the first pixel rate and the second pixel rate. The method further includes using the processing data rate to sequentially perform an image processing to a first image of the first video source and a second image of the second video source corresponding to the same display time, to generate a first processed image and a second processed image.

Video processing circuit and method for handling multiple videos using single video processing path capable of increasing processing data rate and saving circuit area

A video system includes a decoder and a scaler. The decoder tracks a video signal, generates a synchronization signal and a frequency offset signal, decodes the video signal, and outputs a decoded signal in accordance with the synchronization signal. The scaler generates a frequency control signal in accordance with the frequency drift signal, generates an output clock signal in accordance with the frequency control signal, generates a scaled signal in accordance with the decoded signal, and outputs a display signal in accordance with the scaled signal and the output clock signal.

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HsinChu, Taiwan

Yu-Pin Lin