Other

Hewlett-packard Company

Agilent Technologies, Inc.

Oepic Semiconductors, Inc.

Yu-Min Houng

Shih-Yuan Wang

Shih-Ping Wang

Michael R Tan

Nobuhiko P Kobayashi

Albert T Yuen

Sandeep Raj Bahl

Majid L Riaziat

Virginia Robbins

Nicolas J Moll

Ghulam Hasnain

Fred Sugihwo

A method for forming an acoustic resonator comprising: forming a piezoelectric material on a first substrate; and applying the piezoelectric material to a second substrate on which the acoustic resonator is fabricated upon.

Piezoelectric film transfer for acoustic resonators and filters

Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For some embodiments, a collar material is formed that laterally surrounds and is in contact with the PV nanowires along a portion of one or more of their ends. According to some embodiments, the PV nanowires are formed on a crystalline silicon substrate. According to some other embodiments, the PV nanowires are formed on a roll-sourced continuous substrate.

Photovoltaic nanowire structures and related fabrication methods

Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For one preferred embodiment, a canopy-style tip-side electrode layer contacts the tip ends of the PV nanowires and is separated from the substrate surface layer by an air gap layer, the PV nanowires being disposed within the air gap layer. For another preferred embodiment, a tip-side electrode layer is disposed upon a layer of optically transparent, electrically insulating solid filler material that laterally surrounds the PV nanowires along a portion of their lengths, wherein an air gap is disposed between the solid filler layer and the substrate surface layer. Methods for fabricating the nanowire-based photovoltaic energy conversion devices are also described.

Nanowire-based photovoltaic energy conversion devices and related fabrication methods

A heterojunction bipolar transistor (HBT) having a base-emitter junction that exhibits the desirable properties of a GaAsSb/AlInAs interface, but which includes an intermediate layer in the emitter such that the intermediate layer contacts the GaAsSb base and the AlInAs emitter. The intermediate layer is sufficiently thin to be substantially electrically transparent, but sufficiently thick to provide a surface over which to grow the AlInAs emitter. The intermediate layer may be of a material such as InP, which has a bulk lattice constant that matches the lattice constant of the GaAsSb base and the AlInAs emitter. Alternatively, the intermediate layer may be of a material having a lattice constant different than that of the GaAsSb base and the AlInAs emitter, but may be pseudomorphically grown so as to provide an apparent lattice-match to the GaAsSb base and the AlInAs emitter.

Heterojunction bipolar transistor (HBT) having an improved emitter-base junction

Systems and methods of manufacturing etchable heterojunction interfaces and etched heterojunction structures are described. A bottom layer is deposited on a substrate, a transition etch layer is deposited over the bottom layer, and a top layer is deposited over the transition etch layer. The transition etch layer substantially prevents the bottom layer and the top layer from forming a material characterized by a composition substantially different than the bottom layer and a substantially non-selective etchability with respect to the bottom layer. By tailoring the structure of the heterojunction interface to respond to heterojunction etching processes with greater predictability and control, the transition etch layer enhances the robustness of previously unreliable heterojunction device manufacturing processes. The transition etch layer enables one or more vias to be etched down to the top surface of the bottom layer in a reliable and repeatable manner. In particular, because the transition etch layer enables use of an etchant that is substantially selective with respect to the bottom layer, the thickness of critical device layers may be determined by the precise epitaxial growth processes used to form the bottom layer rather than relatively imprecise non-selective etch processes.

Etching heterojunction interfaces

A substantially n-type substrate structure having a p-type surface for use in semiconductor devices as a substitute for a p-type semiconductor substrate. The substrate structure comprises a substrate region and a buffer region. The substrate region is a region of n-type compound semiconductor, and includes a degeneratively n-doped portion adjacent its first surface. The buffer region is a region of compound semiconductor doped with a p-type dopant. The buffer region is located on the first surface of the substrate region and includes a surface remote from the substrate region that provides the p-type surface of the substrate structure. The buffer region also includes a degeneratively p-doped portion adjacent the degeneratively n-doped portion of the substrate region. The substrate structure includes a tunnel junction between the degeneratively n-doped portion of the substrate region and the degeneratively p-doped portion of the buffer region. The substrate structure is made by degeneratively doping a substrate region of n-type compound semiconductor material adjacent its first surface with an n-type impurity, and depositing a layer of compound semiconductor material doped with a p-type impurity on the first surface of the substrate region to form a buffer region that includes a surface remote from the substrate region. In the course of depositing the compound semiconductor material to form the buffer region, the compound semiconductor material is degeneratively doped with the p-type impurity at least in a portion adjacent the substrate region to form a tunnel junction between the substrate region and the buffer region.

N-drive, p-common light-emitting devices fabricated on an n-type

A surface-emitting laser includes optically transparent layers on a side of a DBR mirror structure that is opposite to an optical cavity of the laser. In one embodiment, the transparent layer is a heat-conducting layer that has an efficient heat transfer relationship with an opening in a top electrode and with a heat-spreading layer. The heat-spreading layer increases the diameter of the electrode, so as to reduce the thermal impedance of the surface-emitting laser. The heat-spreading layer may be annular in shape and may have an inside diameter that is less than the outside diameter of the electrode, allowing the heat-spreading layer to first overlap the electrode and then overlap the portion of the heat-conducting layer that resides on the inside portion of the electrode. In another embodiment, the optically transparent layer is positioned between the top electrode and the top DBR mirror structure of the surface-emitting laser. In this embodiment, the transparent layer is a current-spreading layer that reduces the lateral resistance of the laser. Lateral resistance is reduced by providing a layer having a thickness of one-half of the wavelength of the light energy generated in the laser times an odd multiple greater than one. Optionally, two half-wavelength layers may be formed between the electrode and the mirror structure, with the upper layer being selected primarily for its electrical properties and the lower layer being selected primarily for its optical properties.

Growing community of inventors

Cupertino, CA, United States of America

Yu-Min Houng