Industrial Technology Research Institute

Yu-Lin Chao

Shu-Jung Yang

Chun-Kai Liu

Heng-Chieh Chien

Jeng-Yeong Tyan

Ra-Min Tain

Ming-Ji Dai

Chia-Wen Wang

Chih-Chung Chiu

Shu-Chen Huang

Sheng-Tsai Wu

Chih-Ming Shen

John H Lau

Yao-Shun Chen

Ming Kaan Liang

Jiin Shing Perng

Yu-Min Lin

Wei-Chung Lo

Shyi-Ching Liau

Jing-Yao Chang

Feng-Hsiang Lo

Ming-Che Hsieh

Chih-Ming Tzeng

Chih-Yao Wang

Wei Yu Li

Ming-Kaan Liang

Chih-Yuan Cheng

Li-Ling Liao

Rong-Chang Fang

Wen-Fu Hsu

Cheng-Yeh Yang

Chia-Wei Jui

Chao-Tao Wu

June-Chien Chang

An antenna-in-package with a heat dissipation structure includes a circuit board, an antenna substrate, a chip, a plurality of heat dissipation fins, a chassis, and dielectric fluid. The circuit board has a first surface and a second surface opposite to the first surface. The antenna substrate is disposed above the first surface of the circuit board. The chip is disposed between the antenna substrate and the first surface of the circuit board and is electrically connected to the antenna substrate. The plurality of heat dissipation fins protrude from the second surface of the circuit board. The chassis encapsulates the circuit board, the antenna substrate, the chip, and the plurality of heat dissipation fins. The dielectric fluid circulates and flows in the chassis through a cooling circulation device and is in direct contact with the plurality of heat dissipation fins.

Antenna-in-package with heat dissipation structure

A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer. The circuit substrate is electrically connected to the second redistribution structure layer of the package assembly through the connectors.

Heterogeneous integration semiconductor package structure

An ear tag module includes a rod member, a spike, a circuit component, and a temperature sensor. The spike is disposed on one side of the rod member, and the circuit component is disposed on another side of the rod member. The temperature sensor is electrically connected to the circuit component. When the spike penetrates an ear, the ear is in contact with a sensing area of the rod member, and the temperature sensor is located in the rod member to detect a temperature of the ear and transmit at least one temperature sensing information to the circuit component.

Ear tag module

A plug-in type power module includes a power unit and a heat-transfer unit vertically disposed on the power unit and extending outwardly away from two sides of the power unit. A first ceramic layer is disposed between the power unit and the heat-transfer unit. Therefore, heat generated by the power unit can be transferred from the first ceramic layer to the heat-transfer unit to increase the speed of heat dissipation. A subsystem having the plug-in type power module is also provided.

Plug-in type power module and subsystem thereof

A power module including a plurality of substrates, a plurality of power devices, and a heat dissipation assembly is provided. The substrates are located on different planes and surround an axis. Each of the substrates extends along the axis. The power devices electrically connected with each other are disposed on the substrates respectively. The heat dissipation assembly is disposed on the substrates and opposite to the power devices. Heat generated from the power devices is transferred to the heat dissipation assembly through the substrates.

Power module

An intelligent diagnosis system for a power module. The system includes a power module, a hardware checking module and a diagnostic module. The power module has a temperature sensing element for obtaining a temperature difference between a starting minimum temperature and a current temperature. The hardware checking module has a current sensing element, a voltage sensing element and a magnetic coupling closed loop detection element for obtaining the current, the output voltage and the input voltage of the power module, and the hardware loop status, respectively. The diagnostic module calculates the number of cycles that have been operated, a measured impedance and an instantaneous power based on those measurement results, and calculating a risk index based on the number of cycles that have been operated, the temperature difference, the measured impedance, the instantaneous power and the hardware loop status, thereby determining the accumulation of the abnormality index record.

Intelligent diagnosis system for power module and method thereof

A rail-type organic light emitting diode lamp assembly is provided. The lamp assembly includes a lamp module, an annular member, a connector, a conductive member, and a rail module. The annular member includes a protrusion portion having a pair of indentations. The connector is connected to the annular member, and includes a through hole, a first end provided with a pair of ears and a second end provided with a pair of hooks. The conductive member is provided in the through hole and has a first end in contact with the annular conductive coil. The rail module is connected with the connector and includes a conductor in contact with a second end of the conductive member. The connector can be slidably hooked to the rail module through the hooks, and after the ears are inserted into the indentations, the annular member can be rotatable with respect to the connector.

Rail-type OLED lamp assembly

A power module and a manufacturing method thereof are provided, and the power module includes a carrier substrate, an interconnection layer, a first chip, a second chip, a ceramic bonding substrate, a top interconnection layer and a lead frame. The interconnection layer is disposed on the carrier substrate. The first chip and the second chip are disposed on the interconnection layer, and electrically connected to the interconnection layer. The ceramic bonding substrate is disposed on the interconnection layer, and is disposed in between the first chip and the second chip so as to separate the first chip from the second chip. The top interconnection layer is disposed on the ceramic bonding substrate, covers the first chip and the second chip, and is electrically connected to the first chip and the second chip. The lead frame is disposed on the top interconnection layer and electrically connected to the top interconnection layer.

Power module and manufacturing method thereof

A power module includes a first substrate, at least two power elements, at least one first conductive structure and at least one leadframe. The first substrate includes a dielectric frame, two first fan-out circuit structure layers and two dielectric plates. The two first fan-out circuit structure layers are respectively disposed on two opposite surfaces of the dielectric frame, the two dielectric plates are respectively disposed on the two first fan-out circuit structure layers, each of the dielectric plates has at least one opening, and the opening and the corresponding first fan-out circuit structure layer form a concavity. The two power elements are respectively embedded in the two concavities. The two power elements are electrically connected to each other through the first conductive structure. The leadframe disposed at the first substrate is electrically connected to the two power elements, and is partially extended outside the first substrate.

A thinned integrated circuit device and manufacturing process for the same are disclosed. The manufacturing process includes forming a through-silicon via (TSV) on a substrate, a first terminal of the TSV is exposed on a first surface of the substrate, disposing a bump on the first surface of the substrate to make the bump electrically connected with the TSV, disposing an integrated circuit chip (IC) on the bump so that a first side of the IC is connected to the bump, disposing a thermal interface material (TIM) layer on a second side of the IC opposite to the first side of the IC, attaching a heat-spreader cap on the IC by the TIM layer, and backgrinding a second surface of the substrate to expose the TSV to the second surface of the substrate while carrying the heat-spreader cap.

Thinned integrated circuit device and manufacturing process for the same

A power module includes a first substrate, at least two power elements, at least one conductive structure and at least one leadframe. The first substrate includes a first dielectric layer and two first metal layers. The first dielectric layer has at least two concavities and two opposite surfaces, the two first metal layers are respectively disposed on the two surfaces, and the two concavities are respectively formed on the two surfaces. The two power elements are respectively embedded in the two concavities of the first dielectric layer. The two power elements are electrically connected to each other through the conductive structure. The leadframe disposed at the first substrate is electrically connected to the two power elements, and is partially extended outside the first substrate.

A chip stacking structure including a carrier, a first redistribution layer, a second redistribution layer, at least one first chip, at least one second chip, and at least one conductor is provided. The carrier has a first surface and a second surface opposite to each other. The carrier has at least one through hole. The first and second redistribution layers are disposed on the first and second surfaces of the carrier, respectively. The first and second chips are disposed on the first and second surfaces of the carrier and electrically connected with the first and second redistribution layers, respectively. The conductor is disposed on one of the first and second chips. The conductor is disposed in the through hole. The first and second chips are electrically connected by the conductor. A gap is formed between the conductor and an inner wall of the carrier which surrounds the through hole.

Chip stacking structure and fabricating method of the chip stacking structure

A light emitting apparatus comprising a substrate, a first functional chip and a first light emitting component is provided. The substrate, the first functional chip, and the first light emitting component have a plurality of first bumps. In addition, the first functional chip has a plurality of first vias. The first light emitting component and the first functional chip are stacked on the substrate. Hence, the first light emitting component is electrically connected to the first functional chip and the substrate by the first vias and the first bumps.

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Hsinchu, Taiwan

Yu-Lin Chao