Mediatek Singapore Pte. Ltd.

Yu-Kai Chou

Kun Lan

Yingyi Liu

Cong Liu

Chih-Chien Huang

Cheng Tao

Yue Feng

A switch-driving circuit and a Digital-to-Analog Converter (DAC) using the switch-driving circuit are provided. The switch-driving circuit includes a main cell and a reference cell. The main cell includes a current source and a resistance-control component electronically connected to the current source. The reference cell is coupled to the current source and the resistance-control component, and includes a first loop, the first loop is configured to track a target reference voltage so as to provide at least one first control voltage to control a resistance change of the resistance-control component. The reference cell and the main cell are implemented by MOS transistors in place of capacitors which occupy an increased circuit area, rendering reduced circuit area for the switch-driving circuit, and decreasing manufacturing costs. Further, the switch-driving circuit outputs a voltage signal with reduced noise, increasing the performance of the Digital-to-Analog Converter.

Switch-driving circuit and DAC using the same

An Analog to Digital Converter (ADC), an analog-to-digital conversion method, and an integrated circuit including the ADC. The ADC includes an input adjustment buffer stage, a sub-ADC, and a sample switch. The sample switch is coupled between the output node of the input adjustment buffer stage and the input node of the sub-ADC. When the sample switch is opened, the input adjustment buffer stage is configured to switch between a first work state and a second work state according to a predetermined rule, and to adjust an input voltage signal of the input adjustment buffer stage based on transitions between the first and second work states. When the sample switch is closed, the input adjustment buffer stage is configured to provide an adjusted voltage signal to the input node of the sub-ADC, and the sub-ADC is configured to perform an analog-to-digital conversion onto the adjusted voltage signal.

ADC, IC including the same, and ADC method thereof

A voltage regulator includes a pass transistor, an operational amplifier and a voltage divider circuit. The pass transistor receives a supply voltage to generate a regulated output voltage according to a control signal. The operational amplifier generates the control signal according to a feedback voltage. The voltage divider circuit generates the feedback voltage at a feedback node according to the regulated output voltage, and includes a string of resistors and a stabilization element. The string of resistors is coupled to the pass transistor and includes multiple resistors. The stabilization element is coupled to the resistors and receives the regulated output voltage.

Stabilized voltage regulator

An analog-to-digital converter is provided. The analog-to-digital converter includes a sampling-voltage providing circuit, a first comparison circuit, a second comparison circuit, and an encoder circuit. The sampling-voltage providing circuit provides a group of first comparison voltages and a group of second comparison voltages. The first comparison circuit performs a first comparison operation to an analog-signal input quantity according to the group of first comparison voltages to generate a first comparison digital quantity. The second comparison circuit selects second comparison voltages among the group of second comparison voltages according to the first comparison digital quantity and performs a second comparison operation to the analog-signal input quantity according to the selected second comparison voltages to generate a second comparison digital quantity. The encoder circuit encodes the first comparison digital quantity and the second comparison digital quantity and generates a digital quantity corresponding to the analog-signal input quantity.

Analog-to-digital converters and pipeline analog-to-digital converters

A multiplying digital-to-analog converter (MDAC) is provided. The MDAC includes a sub DAC decoding circuit, a capacitor-switch circuit, and an operation amplifier circuit. The capacitor-switch circuit includes at least two sampling capacitor sets which are coupled in parallel. The number of sampling capacitors in one of the sampling capacitor sets is larger than or equal to two. Each sampling capacitor set is coupled to an analog-signal input quantity through a sampling switch and to a corresponding output terminal of the sub DAC decoding circuit through a decoding switch. The sub DAC decoding circuit decodes a digital quantity and outputs a corresponding analog signal at each output terminal, such that the corresponding analog signals are applied to the respective sampling capacitor sets through the decoding switches and summed by the respective sampling capacitor sets to obtain an analog-signal quantity corresponding to the digital quantity.

Multiplying digital-to-analog converters and pipeline analog-to-digital converter using the same

A method for configuring a plurality of analog-to-digital converter (ADC) keys includes: utilizing a processor for determining a plurality of divided-voltages respectively corresponding to the Keys according to a plurality of voltage variation ranges respectively corresponding to the Keys; and calculating a plurality of resistive values of a voltage dividing model according to at least the divided-voltages, wherein the voltage dividing model has a plurality of voltage dividing configurations respectively corresponding to the keys.

Method for configuring analog-to-digital converter keys and non-transitory machine readable medium storing program code executed for performing such method

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Hsinchu, Taiwan

Yu-Kai Chou