Taiwan Semiconductor Manufacturing Comp. Ltd.

National Taiwan University

Realtek Semiconductor Inc.

Yu-Jui Wu

Cheng-Lin Huang

Kuo-Chio Liu

Chien-Chen Li

Lieh-Chuan Chen

Che-Jung Chu

Ling-Wei Li

Sheng-Yao Yang

Jiun-Yun Li

Jui-Chun Weng

Shyh-Wei Cheng

Shih-Yuan Chen

Chiung-Yu Chen

Yao-Chun Chang

Rui-Fu Xu

Ting-I Yeh

Hsin-Yu Chen

Fu-Jier Fan

Hsi-Cheng Hsu

Ho-Yin Yiu

Shiuan-Jeng Lin

Ting-Wei Huang

Wei-Ding Wu

Ji-Hong Chiang

Ching-Hsiang Hu

Hung-Lin Chen

Ruey-Yun Shiue

Yen Chuang

Ming-Tsung Chen

Ming-Hsien Chen

Huang-Sheng Lin

Tian Sheng Lin

Chia-Yu Liu

Hsuan-Yen Chung

Wei-Chih Hou

Aaron Wang

Albion Pan

Bob Sun

Hsiang-Wei Wang

Nai-Wen Hsu

An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and overlaps with the transistor. The ring resonator includes a conductive loop and an impedance matching element. The conductive loop includes a loop portion having two first parts and a second part and two feeding lines. Each of the first parts of the loop portion is between the second part of the loop portion and one of the feeding lines, and a tunnel barrier of the transistor is closer to the second part than to the feeding lines. The impedance matching element is closer to the feeding lines than to the second part.

Electronic device

A wireless communication device includes a transceiver device and a data processing device. The transceiver device receives a frame from a wireless communication channel. The data processing device receives the frame and determines whether at least one of multiple predetermined frames has been received or is about to be received according to the frame. The data processing device enables a batch-frame indication mechanism when determining that said at least one of the multiple predetermined frames has been received or is about to be received. When the batch-frame indication mechanism is enabled, every time when one of the multiple predetermined frames is received, it is buffered in a reception queue instead of issuing a fetch indication, and when a number of predetermined frames buffered in the reception queue reaches a predetermined batch size, the data processing device issues the fetch indication to a back-end processing device.

Wireless communication device and data processing method

A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.

Chip package structure with ring-like structure

A flash memory device includes a substrate, a semiconductor quantum well layer, a semiconductor spacer, a semiconductor channel layer, a gate structure, and source/drain regions. The semiconductor quantum well layer is formed of a first semiconductor material and is disposed over the substrate. The semiconductor spacer is formed of a second semiconductor material and is disposed over the first semiconductor channel layer. The semiconductor channel layer is formed of the first semiconductor material and is disposed over the semiconductor spacer. Thea gate structure is over the second semiconductor channel layer. The source/drain regions are over the substrate and are on opposite sides of the gate structure.

Flash memory device and method thereof

A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive bump over and electrically connected to the chip. The chip package structure includes a ring-like structure over and electrically insulated from the chip. The ring-like structure surrounds the conductive bump, and the ring-like structure and the conductive bump are made of a same material.

A method for forming a chip package structure is provided. The method includes forming a first conductive bump and a first ring-like structure over a chip. The first ring-like structure surrounds the first conductive bump, the first ring-like structure and the first conductive bump are made of a same first material, the chip includes an interconnect structure, and the first ring-like structure is electrically insulated from the interconnect structure and the first conductive bump. The method includes bonding the chip to a substrate through the first conductive bump.

An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The transistor is configured to generate a quantum dot. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and is configured to determine a resonance frequency of the ring resonator.

Electronic device and manufacturing method thereof

Chip package structure including ring-like structure and method for forming the same

A method for manufacturing a metal-insulator-metal (MIM) capacitor with a top electrode that is free of sidewall damage is provided. A bottom electrode layer is formed with a first material. An inter-electrode dielectric layer is formed over the bottom electrode layer. A top electrode layer is formed over the inter-electrode dielectric layer and without the first material. A first etch is performed into the top electrode layer and the inter-electrode dielectric layer to form a top electrode. A second etch into the bottom electrode layer to form a bottom electrode. The present application is also directed towards a MIM capacitor resulting from performing the method.

Metal-insulator-metal (MIM) capacitor with an electrode scheme for improved manufacturability and reliability

The present disclosure relates to a MEMS package having an outgassing element configured to adjust a pressure within a hermetically sealed cavity by inducing outgassing of into the cavity, and an associated method. In some embodiments, the method is performed by forming an outgassing element within a passivation layer over a CMOS substrate and forming an outgassing resistive layer to cover the outgassing element. The outgassing resistive layer is removed from over the outgassing element, and the MEMS substrate is bonded to a front side of the CMOS substrate to enclose a first MEMS device within a first cavity and a second MEMS device within a second cavity. After removing the outgassing resistive layer, the outgassing element releases a gas into the second cavity to increase a second pressure of the second cavity to be greater than a first pressure of the first cavity.

Selective nitride outgassing process for MEMS cavity pressure control

Top via pattern for a bond pad structure has at least one first via group and at least one second via group adjacent to each other. The first via group has at least two line vias extending in a first direction. The second via group has at least two line vias extending in a second direction different from said first direction. The line via of the first via group does not cross the line via of the second via group.

Top via pattern for bond pad structure

Growing community of inventors

Hsinchu, Taiwan

Yu-Jui Wu