Taiwan Semiconductor Manufacturing Comp. Ltd.

Yu-jiun Peng

Hsiu-Hao Tsao

Chang-Jhih Syu

Kuo-Feng Yu

Shih-Hao Lin

Chang-Yun Chang

Jian-Hao Chen

Chih-Hao Yu

Chien-Chih Lin

An Chyi Wei

Yu-Wen Wang

Shu-Han Chen

Szu-Chi Yang

Chun-Ming Yang

A method for forming a multi-gate semiconductor structure is provided. A substrate including a fin structure is received. First portions of the fin structure are removed to expose a source/drain region of the fin structure. A semiconductor layer is formed in the source/drain region. Second portions of the fin structure are removed to expose a channel region of the fin structure. A surface of the channel region of the fin structure is cleaned. An interfacial layer is formed over the cleaned surface of the channel region of the fin structure.

Method for forming multi-gate semiconductor structure

In an embodiment, a structure includes: a semiconductor substrate; a gate spacer over the semiconductor substrate, the gate spacer having an upper portion and a lower portion, a first width of the upper portion decreasing continually in a first direction extending away from a top surface of the semiconductor substrate, a second width of the lower portion being constant along the first direction; a gate stack extending along a first sidewall of the gate spacer and the top surface of the semiconductor substrate; and an epitaxial source/drain region adjacent a second sidewall of the gate spacer.

Structure having gate spacers with projecting portions extending into a gate dielectric

A method of fabricating a device includes providing a fin having an epitaxial layer stack with a plurality of semiconductor channel layers interposed by a plurality of dummy layers. In some embodiments, the method further includes exposing lateral surfaces of the plurality of semiconductor channel layers and the plurality of dummy layers within a source/drain region of the semiconductor device. In some examples, the method further includes etching the exposed lateral surfaces of the plurality of dummy layers to form recesses and forming an inner spacer within each of the recesses, where the inner spacer includes a sidewall profile having a convex shape. In some cases, and after forming the inner spacer, the method further includes performing a sheet trim process to tune the sidewall profile of the inner spacer such that the convex shape of the sidewall profile becomes a substantially vertical sidewall surface after the sheet trim process.

Multi-gate device fabrication and structures thereof

Growing community of inventors

HSINCHU, Taiwan

Yu-jiun Peng