Boe Technology Group Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Tsinghua University

Yu Ji

Zheng Wang

Ning Liu

Liangchen Yan

Qinghe Wang

Tongshang Su

Yongchao Huang

Lei Feng

Yang Zhang

Dongfang Wang

Tao Ma

Jun Cheng

Haitao Wang

Wei Song

Yangkun Jing

Lei Song

Chao Zhou

Guangyao Li

Yingbin Hu

Chengshao Yang

Jinliang Hu

Bei Wang

Shengli Liu

Yunlong Wang

Youpeng Gan

Guoping Qian

Xianchun Huang

Zhengyun Wu

Chengye Wu

Youhui Zhang

Wanqing Chen

Lingling Zeng

An array substrate, a display panel and methods of manufacturing the same are provided. The method of manufacturing an array substrate according to an embodiment of the present disclosure includes: forming f pixel electrodes and a conductive structure on a substrate through a patterning process, wherein the pixel electrodes arranged in a first direction are connected through the conductive structure; and forming a signal line on the substrate through a patterning process, wherein the signal line and the pixel electrodes are disposed in the same layer. By means of the array substrate according to the embodiments of the present disclosure, the problem that it is not easy to discover the point defects caused by short circuit between the signal line and pixel electrodes in the related art can be solved.

Array substrate, display panel and manufacturing method thereof

A hardware neural network conversion method, a computing device, a compiling method and a neural network software and hardware collaboration system for converting a neural network application into a hardware neural network fulfilling a hardware constraint condition are disclosed. The method comprises: obtaining a neural network connection diagram corresponding to the neural network application; splitting the neural network connection diagram into neural network basic units; converting each of the neural network basic units so as to form a network having equivalent functions thereto and formed by connecting basic module virtual entities of neural network hardware; and connecting the obtained basic unit hardware network according to the sequence of splitting so as to create a parameter file for the hardware neural network. The present disclosure provides a novel neural network and a brain-like computing software and hardware system.

Hardware neural network conversion method, computing device, compiling method and neural network software and hardware collaboration system

A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor is formed on a substrate and includes: an active layer on the substrate, the active layer including a source region, a drain region, and a channel region between the source region and the drain region; a first gate electrode on a side of the active layer away from the substrate; and a second gate electrode on a side of the first gate electrode away from the substrate, wherein a thickness of the first gate electrode is smaller than a thickness of the second gate electrode.

Thin film transistor and manufacturing method thereof, array substrate and display device

A thin film transistor, a display panel and a preparation method thereof and a display apparatus are provided. The thin film transistor includes: a substrate; a gate metal located on a side of the substrate; a gate insulating layer located on a side of the gate metal away from the substrate; an active layer located on a side of the gate insulating layer away from the substrate; a first metal oxide and a second metal oxide which are located on a side of the active layer away from the substrate and are arranged on a same layer; and a source metal and a drain metal which are located on sides of the first metal oxide and the second metal oxide away from the substrate and are arranged in a same layer.

Thin film transistor, display panel and preparation method thereof, and display apparatus

The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and thin-film transistors disposed on the base substrate, where the thin-film transistors each comprises a gate, an active layer insulated from the gate, and two ohmic contact parts in direct contact with the active layer, leaving a gap region between the two ohmic contact parts; and each of the ohmic contact parts comprises a lightly doped region and a heavily doped region, and an orthographic projection of the lightly doped region on the base substrate and an orthographic projection of the heavily doped region on the base substrate do not overlap each other.

Display substrate, manufacturing method thereof, and display device

The present disclosure provides an array substrate, its manufacturing method and testing method, and a display device. The array substrate includes a (Test Element Group) TEG arranged at a non-display area and including a plurality of to-be-tested elements and a plurality of testing contact electrodes configured to test the to-be-tested elements. Each of the to-be-tested elements is connected to at least two of the testing contact electrodes, and at least one of the testing contact electrodes is shared by at least two of the to-be-tested elements.

Array substrate, its manufacturing method and testing method, and display device

Growing community of inventors

Beijing, China

Yu Ji