Dell Products Inc.

Trend Micro Inc.

Yu-Hsuan Chou

Ching-Lung Chao

Wei G Liu

Wen-Kwang Tsao

Hsin-Chieh Wang

Yiping Zhou

Yu-Shuang Liao

Yi-De Wu

Chin-En Yang

Jaime Yaneza, Jr

A memory device Post Package Repair (PPR) failure handling system includes a memory device having a first memory subsystem, and a memory management subsystem coupled to the memory device. The memory management subsystem identifies a first PPR request to perform first PPR operations on the first memory subsystem, and performs first PPR operations on the first memory subsystem based on the first current PPR request. The memory management subsystem may determine that the first PPR operations on the first memory subsystem have failed and, in response, increment a first PPR failure counter for the first memory subsystem, If, following the incrementing the first PPR failure counter for the first memory subsystem, the memory management subsystem determines that the first PPR failure counter for the first memory subsystem has reached a PPR failure count threshold, the memory management subsystem disables use of the memory device.

Memory device PPR failure handling system

An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.

Dual in-line memory module map-out in an information handling system

A cybersecurity system includes sensors that detect and report computer security events. Collected reports of computer security events are formed into state sequences, which are used as training data to train and build a prediction model. A current computer security event is detected and used as an input to the prediction model, which provides a prediction of a next computer security event. A monitoring level of a cybersecurity sensor is adjusted in accordance with the predicted next computer security event.

Computer network monitoring with event prediction

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Yu-Hsuan Chou