Mediatek Corporation

Tsinghua University

Gp Medical, Inc.

Cyntec Company

Applied Materials, Inc.

Obi Pharma Inc.

Au Optronics Corporation

Mediatek Incorporation

Precision Instrument Development Center

Precision Instrument Development Center National Applied Research Laboratories

Yu-Hsin Lin

Hung-Chieh Tsai

Hosheng Tu

Hsing-Wen Sung

Chen-Yen Ho

Chi-Lun Lo

Hsiang-Fa Liang

Wen-Chieh Wang

Mei-Chin Chen

Dieter Haas

Jungmin Lee

Chung-Chia Chen

Yu-Chen Lin

Si Kyoung Kim

I-Ju Chen

Cheng-Chi Wang

Chien-Chun Huang-Fu

Ji Young Choung

Takuji Kato

Cheng-Der Tony Yu

Jyh-Shin Chen

Chun-Hsin Liu

Chi-Hsien Chen

Ming-Da Tsai

Yuan-Chieh Lin

Fong-Wen Lee

Tze-Chien Wang

Yueh-Min Chen

Sheng-Jui Huang

Min-Feng Chung

Hsueh-Kun Liao

Jong-Woei Chen

Wen-Hao Wu

Yih-Huang Hsieh

Kuan Yu Chiu

Yi-Chiuen Hu

Ching Hsiang Yu

Wei-Han Lee

Nan-Hsuan Wang

Sheng-Wen Chen

Hui-Ling Kao

Yu-Sheng Kung

Shih-Chieh Lin

Yi-Hsien Cho

Ji-Young Choung

Wei Lee

Yuan-chieh Lin

Yen-Horng Chen

Po-Ying Chuang

Chung-Hsiung Wang

Lang-Yi Chiang

Stefan Keller

Hsiang-Ji Hsieh

Wei-Chien Chang

Ting-Yang Wang

Tsung-Huan Cheng

Takashi Anjiki

Yu-Kai Chou

Yung-Chun Yang

Yu-Hsiang Lo

Chung Hao Chang

Chung-Chih Cheng

Ying-Min Liao

Cheng Der Tony Yu

Chung-Hao Chang

Chien-Chun Huang-fu

Cheng Der Yu

Wei Han Lee

A method of determining UE access identity for a UE that is registered to the same or different PLMN networks over 3GPP and non-3GPP accesses is proposed. The UE registers to one or more Public Land Mobile Network (PLMN) or Standalone Non-Public Network (SNPN) over 3GPP access and non-3GPP access. If the UE registers to the same PLMN/SNPN over 3GPP and non-3GPP access, then the UE handles the UE access identity as one common parameters. On the other hand, if the UE registers to different PLMN/SNPN over 3GPP and non-3GPP, then the UE handles the UE access identity as two independent parameters. The access identity may comprise a priority indicator IE that is set to 'Access Identity 1 valid' for MPS or “Access Identity 2 valid” for MCS.

UE access identity determination for 3GPP and non-3GPP accesses

A coil structure comprises a coil and a conductive terminal part, wherein the coil is formed by a conductive wire comprising a metal wire and at least one insulating layer encapsulating the metal wire, wherein a first terminal part of the metal wire is exposed from the at least one insulating layer, wherein a first portion of the conductive terminal part encapsulates the first terminal part of the metal wire and a second portion of the conductive terminal part extends from said first portion as an electrode for electrically connecting to an external circuit.

Coil structure

An amplification circuit with a common-mode voltage compensation circuit is shown. The common-mode voltage compensation circuit has a first compensation resistor coupled between an input terminal of a loop filter of the amplification circuit and a control node, and a second compensation resistor coupled between another input terminal of the loop filter and the control node. The control node is coupled to a power ground voltage when the two output signals of the amplification circuit are high, and it is coupled to a power supply voltage when the two output signals of the amplification circuit are low.

Amplification circuit with compensation for common-mode voltage fluctuation

A fast-transient buffer is shown. The fast-transient buffer has a flipped voltage follower coupled between the input terminal and the output terminal of the fast-transient buffer, and a first MOS transistor coupled to the flipped voltage follower as well as the output terminal of the fast-transient buffer. The first MOS transistor regulates the output voltage of the output terminal of the fast-transient buffer, in the opposite direction in comparison with an output voltage regulation direction due to the flipped voltage follower.

Fast-transient buffer

The present invention provides a quadrature phase detector including a detection circuit. The detection circuit includes a first switch, a second switch and a first filter, wherein the first switch is controlled by a second clock signal to selectively couple a first clock signal to a first node, the second switch is controlled by the second clock signal to selectively coupled the first node to a reference voltage, and the first filter is configured to filter voltages at the first node to generate a first detection result.

Low power quadrature phase detector

The invention encompasses therapeutic compositions including Globo H-KLH conjugates and/or therapeutic antibodies as well as methods of making and using the same to treat proliferative diseases such as cancer. The therapeutic conjugates include an antigen linked to a carrier. In particular the therapeutic conjugates include a Globo H moiety and a KLH moiety and/or a derivatized KLH moiety subunit optionally linked via a linker. The therapeutic compositions are in part envisaged to act as cancer vaccines for boosting the body's natural ability to protect itself, through the immune system from dangers posed by damaged or abnormal cells such as cancer cells. An effective immune response is one that reduces the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.

Compositions of a carbohydrate vaccine for inducing immune responses and uses thereof in cancer treatment

The present invention provides a filtering circuit comprising a poly phase filter and a quadrature phase detector. The poly phase filter comprises a first path, a second path, a third path and a fourth path. The first path is configured to receive a first input signal to generate a first clock signal. The second path comprising a first adjustable delay circuit is configured to receive the first input signal to generate a second clock signal. The third path comprising a second adjustable delay circuit is configured to receive a second input signal to generate a third clock signal. The fourth path is configured to receive the second input signal to generate a fourth clock signal. The quadrature phase detector is configured to detect phases of these clock signals to generate control signals to control the first adjustable delay circuit and the second adjustable delay circuit.

Poly phase filter with phase error enhance technique

A coating layer is formed on a coil made of an insulated conductive wire comprising a metal wire and an insulating layer encapsulating the metal layer, wherein the coating layer encapsulates at least one portion of the insulating layer of the insulated conductive wire so that a terminal part of the metal wire exposed from the insulating layer can be positioned firmly while going through an automatic soldering process for electrically connecting with an external circuit.

Coil assembly

The present invention provides vaccines comprising carbohydrate antigen conjugated to a diphtheria toxin (DT) as a carrier protein, wherein the ratio of the number of carbohydrate antigen molecule to the carrier protein molecule is higher than 5:1. Also disclosed herein is a novel saponin adjuvant and methods to inhibit cancer cells, by administering an effective amount of the vaccine disclose herein.

Vaccines with higher carbohydrate antigen density and novel saponin adjuvant

Embodiments described herein relate to a device comprising a substrate, a pixel-defining layer (PDL) structures disposed over the substrate and defining sub-pixels of the device, and a plurality overhang structures. Each overhang structure is defined by a top structure extending laterally past a body structure. Each body structure is disposed over an upper surface of each PDL structure. Overhang structures define a plurality of sub-pixels including a first sub-pixel and a second sub-pixel. Each sub-pixel includes an anode, an organic light-emitting diode (OLED) material, a cathode, and an encapsulation layer. The OLED materials are disposed over the first anode and extends under the overhang structures. The cathodes are disposed over the OLED materials and under the overhang structures. The encapsulation layers are disposed over the first cathode. The first encapsulation layer has a first thickness and the second encapsulation layer has a second thickness different from the first thickness.

Descending etching resistance in advanced substrate patterning

Embodiments described herein relate to a device including a substrate, a plurality of adjacent pixel-defining layer (PDL) structures disposed over the substrate, and a plurality of sub-pixels. Each sub-pixel includes adjacent first overhangs, adjacent second overhangs, an anode, a hole injection layer (HIL) material, an additional organic light emitting diode (OLED) material, and a cathode. Each first overhang is defined by a body structure disposed over and extending laterally past a base structure disposed over the PDL structure. Each second overhang is defined by a top structure disposed over and extending laterally past the body structure. The HIL material is disposed over and in contact with the anode and disposed under the adjacent first overhangs. The additional OLED material is disposed over the HIL material and extends under the first overhang.

OLED panel with advanced sub-pixel overhangs

A class-D amplifier with good signal-to-noise ratio (SNR) performance is shown. The class-D amplifier includes a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit, which are configured to establish a closed amplification loop. The feedback circuit is configured to establish a feedback path. The class-D amplifier further includes a feedback breaker. The feedback breaker breaks the feedback path in response to conditions in which there no-signal information in the class-D amplifier.

Class-D amplifier with high dynamic range

Exemplary methods of backplane processing are described. The methods may include forming a first metal oxide material on a substrate. The methods may include forming a metal layer over the first metal oxide material. The metal layer may be or include silver. The methods may include forming an amorphous protection material over the metal layer. The amorphous protection material may include a second metal oxide material. The methods may include forming a second metal oxide material over the amorphous protection material. The second metal oxide material may include a crystalline material having one or more grain boundaries. The grain boundaries may include one or more voids.

OLED anode structures including amorphous transparent conducting oxides and OLED processing method comprising the same

Direct current-direct current (DC-DC) converters including buck converters are described. These DC-DC converters may be configured to reduce oscillations that would otherwise arise in the output reference voltage due to ringing effects without significantly lengthening the duration of the transient period. These DC converters may leverage a feedback voltage generated by sensing the current flowing through the inductor of the buck converter. The feedback voltage may compared to a threshold, and the signal resulting from the comparison may be used to vary the reference voltage. The DC-DC converter may be operated in a 'partial reset mode,' in which the voltage generated by sensing the inductor's current is reduced to a value greater than zero in response to the feedback voltage reaching the threshold. Reducing the sense voltage in this manner may reduce the duration of the transient period.

Systems and methods for controlling DC-DC converters using partial resets

A differential to single-ended buffer amplifier with a swing suppression resistor in the differential amplification architecture is shown. The differential to single-ended buffer amplifier has a positive input terminal, a negative input terminal, a differential to single-ended operational amplifier (DISO op amp), and a swing suppression resistor. The DISO op amp has a non-inverting input terminal and an inverting input terminal respectively coupled to the positive input terminal and the negative input terminal, and it has a single-ended output terminal that outputs the output signal of the differential to single-ended buffer amplifier. The swing suppression resistor is connected between the negative input terminal of the differential to single-ended buffer amplifier and the non-inverting input terminal of the DISO op amp.

High-linearity differential to single ended buffer amplifier

Growing community of inventors

Taipei, Taiwan

Yu-Hsin Lin