Taiwan Semiconductor Manufacturing Comp. Ltd.

Yu-Hsiang Cheng

Sheng-Hsiung Chen

Meng-Kai Hsu

Wai-Kei Mak

Ting-Chi Wang

Ding-Wei Huang

Bo-Lin Wu

Pei-Hsuan Lee

Kuang-Shing Chen

Hung-Ming Chen

Che-Wei Wu

Xiaomeng Chen

Shih Huan Chiu

The present disclosure relates to methods of processing a semiconductor substrate in a processing chamber, such as a chemical vapor deposition chamber. The chemical vapor deposition chamber includes a spindle mechanism that cooperates with one or more carrier ring forks to move the semiconductor substrate from one station to another station. The methods include monitoring one or more spindle operation parameters and carrying out one or more maintenance steps on the spindle mechanism based on the results of monitoring the one or more spindle operation parameters. The monitored spindle operation parameters provide an indication of undesirable vibration of the semiconductor substrates in the processing chamber. The vibration of the semiconductor substrates in the processing chamber is undesirable because it promotes generation of unwanted particles that deposit onto a surface of the semiconductor substrate.

Methods for spindle mechanism monitoring and maintenance in processing a semiconductor substrate

A thin-film deposition system includes a top plate positioned above a wafer and configured to generate a plasma during a thin-film deposition process. The system includes a sensor configured to generate sensor signals indicative of a lifetime of a component of the thin-film deposition system, a characteristic of a thin-film deposited by the thin-film deposition system or a characteristic of a process material that flows into the thin-film deposition system. The system includes a control system configured to adjust a relative location of a top plate of the thin-film deposition system with respect to a location of a wafer in the thin-film deposition system during the thin-film deposition process responsive to the sensor signals.

Method and system for adjusting location of a wafer and a top plate in a thin-film deposition process

A high atomic number material is applied to one or more surfaces of a semiconductor structure of a wafer. The one or more surfaces are at a depth different from a depth of a surface of the wafer. An electron beam is scanned over the semiconductor structure to cause a backscattered electron signal to be collected at a collector. A profile scan of the semiconductor structure is generated based on an intensity of the backscattered electron signal, at the collector, resulting from the high atomic number material. The high atomic number material increases the intensity of the backscattered electron signal for the one or more surfaces of the semiconductor structure such that contrast in the profile scan is increased. The increased contrast of the profile scan enables accurate critical dimension measurements of the semiconductor structure.

Semiconductor structure inspection using a high atomic number material

Methods for processing a semiconductor substrate

The present disclosure provides a semiconductor manufacturing method and a system therefore. The semiconductor manufacturing method includes: providing a gas from a container through an outlet to a semiconductor wafer manufacturing equipment, wherein a control valve is connected to the outlet to control a gas flow; retrieving a set of parameters corresponding to the gas flow; and determining a nominal position of the control valve by incorporating the set of parameters through a processor in order to provide a desired flow passage into the semiconductor wafer manufacturing equipment, wherein the semiconductor wafer manufacturing equipment includes a plurality of independent reaction chambers, wherein each reaction chamber is individually supplied with a gas pipe, and each gas pipe receives the gas from the container.

Method and system for manufacturing semiconductor

A method (of generating a layout diagram) includes identifying, in the layout diagram, a group of three or more cells arranged so as to exhibit two or more edge-pairs (EPs) that are edge-wise abutted relative to a first direction. The method further includes, for each of at least one but fewer than all of the three or more cells, selectively moving a given one of cells corresponding to one of the members of the corresponding EP resulting in at least a minimum gap in the first direction between the members of the corresponding EP.

Method and system of generating a layout diagram

A method (of generating a layout diagram) includes: identifying, in the layout diagram, a group of three or more cells which violates a horizontal constraint vector (HCV) and is arranged so as to exhibit two or more vertically-aligned edge-pairs (VEPs); each VEP including two members representing at least partial portions of vertical edges of corresponding cells of the group; relative to a horizontal direction, the members of each VEP being disposed in edgewise-abutment and separated by a corresponding actual gap; and the HCV having separation thresholds, each of which has a corresponding VEP and represents a corresponding minimum gap in the horizontal direction between the members of the corresponding VEP; and for each of at least one but fewer than all of the separation thresholds, selectively moving a given one of cells corresponding to one of the members of the corresponding VEP thereby to avoid violating the HCV.

Growing community of inventors

Hsinchu, Taiwan

Yu-Hsiang Cheng