United Microelectronics Corp.

Yu-Feng Liu

En-Chiuan Liou

Chih-Wei Yang

Yu-Ru Yang

Chia-Fu Hsu

Jian-Cun Ke

Ssu-I Fu

Yu-Ping Wang

Chi-Mao Hsu

Chien-Chung Huang

Nien-Ting Ho

Chien-Ming Lai

Yi-Wen Chen

Ya-Huei Tsai

Tsung-Yin Hsieh

Yu-Ting Tseng

Hung-Yi Wu

The present invention provides a method of forming an integrated circuit including a substrate, a first transistor, a second transistor and a third transistor. The first transistor has a first metal gate including a first bottom barrier layer, a first work function metal layer and a first metal layer. The second transistor has a second metal gate including a second bottom barrier layer, a second work function metal layer and a second metal layer. The third transistor has a third metal gate including a third bottom barrier layer, a third work function metal layer and a third metal layer. The first transistor, the second transistor and the third transistor has the same conductive type. A nitrogen concentration of the first bottom barrier layer&#x3e;a nitrogen concentration of the second bottom barrier layer&#x3e;a nitrogen concentration of the third bottom barrier layer.

Method of forming integrated circuit having plural transistors with work function metal gate structures

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having an interlayer dielectric (ILD) layer thereon; forming a first recess, a second recess, and a third recess in the ILD layer; forming a material layer on the ILD layer and in the first recess, the second recess, and the third recess; performing a first treatment on the material layer in the first recess; and performing a second treatment on the material layer in the first recess and second recess.

Semiconductor device and method for fabricating the same

The present invention provides an integrated circuit including a substrate, a first transistor, a second transistor and a third transistor. The first transistor has a first metal gate including a first bottom barrier layer, a first work function metal layer and a first metal layer. The second transistor has a second metal gate including a second bottom barrier layer, a second work function metal layer and a second metal layer. The third transistor has a third metal gate including a third bottom barrier layer, a third work function metal layer and a third metal layer. The first transistor, the second transistor and the third transistor has the same conductive type. A nitrogen concentration of the first bottom barrier layer&#x3e;a nitrogen concentration of the second bottom barrier layer&#x3e;a nitrogen concentration of the third bottom barrier layer.

Integrated circuit having plural transistors with work function metal gate structures

Growing community of inventors

Tainan, Taiwan

Yu-Feng Liu