Boe Technology Group Co., Ltd.

Ordos Yuansheng Optoelectronics Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Chinese Academy of Medical Sciences

Beijing Geekplus Technology Co. Ltd.

Beijing Zhongxiangying Technology Co., Ltd.

Beijing Wehand-bio Pharmaceutical Co., Ltd.

Ordos Yuansheng G Ronico., Ltd.

Yu Feng

Libin Liu

Li Wang

Guangliang Shang

Jiangnan Lu

Shiming Shi

Can Zheng

Jianchao Zhu

Xinguo Wu

Lujiang Huangfu

Jie Zhang

Hong Liu

Long Han

Fengguo Wang

Liang Tian

Xiyu Zhao

Hao Zhang

Tian Dong

Kuo Sun

Yu Wang

Wenjing Tan

Mei Li

Ming Che Hsieh

Bo Ma

Baoyun Wu

Yuxuan Ma

Shicheng Song

Hong Wang

Peng Liu

Yi Zhang

Weiyun Huang

Yao Huang

Benlian Wang

Bo Wang

Jiantao Liu

Rui Wang

Bo Li

Tuo Sun

Xinshe Yin

Lu Liu

Yun Zhang

Min Liu

Pinfan Wang

Xu Wang

Jingquan Wang

Mingche Hsieh

Jingyi Xu

Fan Zhang

Fangxu Cao

Zhihua Liu

Yanwei Ren

Yong Jiang

Zhixuan Guo

Wanzhi Chen

Jing Xue

Chuan Wang

Yongqiang Zhang

Chengfu Xu

Yue Shan

Xiaochun Xu

Tian Lan

Mengdi Wang

Jianmin Wu

Zhihui Xiao

Chenglong Wang

Haidong Wang

Yue Gao

Ge Zhang

Haijin Wang

Jianfeng Zeng

Weixin Ma

Yuling Liu

Xuejun Xia

Xixi Guo

Wujun Dong

Jun Ye

Jiawei Ren

Baolong Xu

Yanfang Yang

Junzhuo Zhou

Bangyuan Wang

Hengfeng Liao

Ruirui Hao

Wenqiang Lv

Yingpeng Ma

The source, drain and gate of the drive transistor of the pixel drive circuit are respectively connected to the first node, the second node and the third node. The storage capacitor is connected to the third node. The first control unit is used for enabling a path between the second node and the fourth node in response to the first control signal. The second control unit is used for outputting the first power supply voltage to the first node in response to the light-emitting signal. The threshold compensation transistor is used for enabling a path between the second node and the third node in response to the second control signal. The material of the active region is a metal oxide semiconductor.

Pixel drive circuit and driving method thereof, and display panel

Storage rack

A pixel circuit, a pixel driving method, and a display device. The pixel circuit includes a light-emitting element, a driving circuit, a compensation control circuit, a light-emitting control circuit and a discharging circuit; the compensation control circuit controls connection or disconnection between the first node and the driving node under the control of the compensation control signal; the light-emitting control circuit controls connection or disconnection between the driving node and the first electrode of the light-emitting element under control of the light-emitting control signal; the discharging circuit is used for generating a discharging current; in a compensation phase, the discharging current terminal is connected to the driving node, and in a light-emitting phase, the discharging current terminal is connected to the driving node and the first electrode of the light-emitting element, and the discharging current terminal is not directly electrically connected to the first electrode of the light-emitting element.

Pixel circuit, pixel driving method, and display device

A driving circuit is provided. The driving circuit includes one or more scan circuits; wherein the one or more scan circuits comprise a first scan circuit; wherein the first scan circuit comprises a plurality of first scan sub-circuits; and at least two first scan sub-circuits of the plurality of first scan sub-circuits are configured to drive two display sub-areas of a plurality of display sub-areas of a display area with two different driving frequencies in at least one frame of image, respectively.

Driving circuit, display apparatus, and method of operating driving circuit

A display substrate and a display device are provided. The display substrate includes: a base substrate and a plurality of sub-pixels distributed in arrays and provided on the base substrate. And the plurality of sub-pixels is divided into a plurality of sub-pixel columns. The display substrate further includes: a plurality of data lines, each of which is coupled to respective sub-pixels at a corresponding sub-pixel column; a plurality of touch electrodes and a plurality of touch signal lines coupled to corresponding touch electrodes. Specifically an orthogonal projection of each of the touch signal lines on the base substrate is adjacent to an orthogonal projection of a corresponding data line among the plurality of data lines on the base substrate, and each of the touch signal lines comprises first touch portions and second touch portions coupled to each other, the first touch portions and the second touch portions being arranged in different layers, and the second touch portions being of the same material and provided in a same layer as the data lines.

Touch display device reducing risk of residual conductive material between touch signal lines and neighboring data lines

The present disclosure provides a pixel driving circuit, a pixel driving method and a display panel, relating to a field of display technology. The pixel driving circuit includes a driving transistor; a storage capacitor connecting a first node and a second node; a data writing unit configured to output a data voltage to the second node in response to a first scan signal; a light emitting control unit configured to electrically communicate a third node and a fourth node in response to a light emitting control signal; a first reset unit configured to output a reference voltage to the second node in response to the light emitting control signal or a first reset signal; a second reset unit configured to output an initialization voltage to the first node in response to a second reset signal.

Pixel driving circuit, pixel driving method and display panel

A shift register unit and a driving method thereof, a gate drive circuit, and a display device are disclosed. The shift register unit includes: an input circuit, a first control circuit, an output circuit, an output noise reduction circuit, and a reset circuit; wherein the input circuit is connected to an input terminal; the first control circuit is connected to the first node, a second node, and a first clock signal terminal; the output circuit is connected to an output terminal; the output noise reduction circuit is connected to the output terminal; and the reset circuit is connected to a total reset terminal and a first voltage terminal, wherein the total reset signal is an invalid level in a first operation stage, and the total reset signal includes at least one period of valid level in a second operation stage.

Shift register unit and driving method thereof, gate drive circuit, and display device

A pixel circuit, a driving method and a display device. The pixel circuit includes a driving circuit, a first initialization circuit and a reset circuit; the first initialization circuit configured to write a first initial voltage into the first end of the driving circuit under the control of an initialization control signal; the reset circuit is configured to write a reset voltage into the second end of the driving circuit or the first end of the driving circuit under the control of a second scan signal; the driving circuit is configured to control to connect the first end of the driving circuit and the second end of the driving circuit under the control of a potential of a control end of the driving circuit.

Pixel circuit, driving method and display device

A pixel driving circuit is provided. The pixel driving circuit includes a storage capacitor (Cst) having a first capacitor electrode (Ce) and a second capacitor electrode (Ce); a driving transistor (Td) configured to generate a driving current; and a switch (SW) configured to control connection or disconnection between a gate electrode of the driving transistor (Td) and the first capacitor electrode (Ce).

Pixel driving circuit, display panel, method of driving display panel

An array substrate is provided. A respective pixel driving circuit of the array substrate includes a driving transistor, a storage capacitor, and a transistor having a gate electrode connected to a respective second gate line of a plurality of second gate lines, a first electrode connected to a first capacitor electrode of the storage capacitor, and a second electrode connected to a second electrode of a first reset transistor, the transistor being configured to receive a reset signal through the first reset transistor. An active layer of the driving transistor and an active layer of the transistor are spaced apart from each other by at least an insulating layer. The active layer of the driving transistor comprises a first semiconductor material. The active layer of the transistor comprises a second semiconductor material different from the first semiconductor material.

Array substrate and display apparatus

A pixel circuit, a driving method and a display device. The pixel circuit includes a driving circuit, a first control circuit, a compensation control circuit and a first initialization circuit; the first control circuit is configured to control to connect the control end of the driving circuit and the connection node under the control of a first scan signal; the compensation control circuit is configured to control to connect the connection node and the first end of the driving circuit under the control of a second scan signal; the first initialization circuit is configured to write a first initialization voltage into the connection node under the control of an initialization control signal; the driving circuit is configured to control to connect the first end and a second end of the driving circuit under the control of a potential of the control end thereof.

A display substrate and a display device are provided. The display substrate includes a shift register unit, a first clock signal line and a first power line, the shift register unit includes a charge pump circuit, and the charge pump circuit includes a first capacitor, a first transistor and a second capacitor. The charge pump circuit is electrically connected with a first input node and a first node, respectively. A first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a first electrode plate of the second capacitor is connected with the first power line, a second electrode plate of the second capacitor is connected with the first node, a gate electrode of the first transistor is connected with a first electrode or a second electrode of the first transistor.

Display substrate and display device

The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and a plurality of pixels arranged on the base substrate, each pixel includes a plurality of sub-pixels, and each sub-pixel includes a first active layer, a first gate insulation layer, a gate electrode, a second gate insulation layer, a second active layer, a first insulation layer, a source electrode and a drain electrode laminated one on another. The source electrode is connected with the first active layer through a via hole penetrating through the first insulation layer, the second gate insulation layer and the first gate insulation layer, and the source electrode and the drain electrode are connected with the second active layer through a via hole penetrating through the first insulation layer.

Display substrate, manufacturing method thereof, and display device

Provided are a display substrate, a display panel, and a display device. The display substrate includes a base substrate, pixel circuits, groups of data lines, and first power lines. At least one column of pixel circuits is electrically connected to at least one group of data lines and includes first and second pixel circuits alternately arranged in the second direction. The at least one group of data lines includes first and second data lines. For the at least one column of pixel circuits, input transistors of first and second pixel circuits are electrically connected to first and second data lines, respectively. In the first direction, the first data line, the first power line and the second data line are arranged in sequence, and input transistors of first and second pixel circuits are respectively located on a side of the first power line close to the first and second data line.

Display substrate, display panel and display device

Disclosed are a display panel and a display device. The display panel includes a base substrate, and a first display region and a second display region that are located on the base substrate, where the first display region includes a plurality of first sub-pixels and a plurality of transparent regions, the second display region includes a plurality of second sub-pixels, and a distribution density of the first sub-pixels is smaller that of the second sub-pixels; and an area occupied by the first sub-pixels is smaller than that occupied by the second sub-pixels.

Display panel and display device

Growing community of inventors

Beijing, China

Yu Feng