Visual Photonics Epitaxy Co., Ltd.

Visual Photonics Expitaxy Co., Ltd

Yu-Chung Chin

Chao-Hsing Huang

Min-Nan Tseng

Kai-Yu Chen

Van-Truong Dai

Kun-Chuan Lin

Shih-Jane Tsai

Hung-Chi Hsiao

Jhao-Hang He

Van-Truoung Dai

Wei-Chou Wang

Chien-Hung Pan

Huai-Tung Yang

Van-Chien Nguyen

Provided is a semiconductor laser diode including multiple active layers and a grating layer. The semiconductor laser diode includes two (or more than two) active layers, a grating layer, and a tunnel junction. The grating layer and the tunnel junction are provided between the two active layers. The tunnel junction is electrically connected to the two active layers, and the two active layers share and are optically coupled to the grating layer, thereby improving the external quantum efficiency and slope efficiency of the semiconductor laser diode.

Semiconductor laser diode including multiple active layers and a grating layer

Provided is a vertical-cavity surface-emitting semiconductor laser diode, including a substrate and an epitaxial stack structure disposed on the substrate. The epitaxial stack structure includes an active region, a current confinement layer and a mode filter layer. The mode filter layer includes an optical aperture, and the mode filter layer is able to be oxidized. Accordingly, the optical aperture of the mode filter layer is formed by oxidizing the mode filter layer.

Vertical-cavity surface-emitting semiconductor laser diode with the mode filter

Provided is a vertical cavity surface emitting laser diode (VCSEL). A tunnel junction with a high doping concentration is provided in the VCSEL. An n-type semiconductor layer of the tunnel junction has stress relative to the substrate, and is doped with at least one element such that the tunnel junction not only has a high doping concentration, but also the epitaxial layer can be oxidized and the oxidation rate is relatively stable during the oxidation process. Alternatively, the n-type semiconductor layer is doped with at least two elements. As a result, the oxidation process of the VCSEL can be stably performed, and the resistance of the tunnel junction with a high doping concentration is low. The tunnel junction is suitable to be arranged between two active layers of the VCSEL or between the p-type semiconductor and the n-type semiconductor layer of the VCSEL.

Vertical cavity surface emitting laser diode (VCSEL) with tunnel junction

Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a substrate, a sub-collector layer, collector layer, a base layer, and an emitter layer. The collector layer includes a InGaP layer or a wide bandgap layer. The collector layer includes III-V semiconductor material. The bandgap of the wide bandgap layer is greater than that of GaAs.

High ruggedness heterojunction bipolar transistor (HBT)

Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a InGaP layer or a wide bandgap layer. The bandgap of the InGaP layer is greater than 1.86 eV.

Provided is a semiconductor laser diode, including a GaAs/In P substrate and a multi-layer structure on the GaAs/InP substrate. The multi-layer structure includes a lower epitaxial region, an active region and an upper epitaxial region. The active region comprises a first active layer, an epitaxial region and a second active layer, the epitaxial region is disposed between the first active layer and the second active layer, the first active layer comprises one or more quantum well structures or one or more quantum dot structures, and the second active layer comprises one or more quantum well structures or one or more quantum dot structures. the epitaxial region further comprises a tunnel junction and at least one carrier confinement layer, at least one carrier confinement layer is disposed between the tunnel junction and the first active layer or between the tunnel junction and the second active layer such that the at least one carrier confinement layer blocks electrons or holes, and no electrons or holes are able to reach the tunnel junction.

Semiconductor laser diode

Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.

Semiconductor epitaxial wafer

Provided is a vertical cavity surface emitting laser diode (VCSEL) with low compressive strain DBR layer, including a GaAs substrate, a lower DBR layer, a lower spacer layer, an active region, an upper spacer layer and an upper DBR layer. The lower or the upper DBR layer includes multiple low refractive index layers and multiple high refractive index layers. The lower DBR layer, the lower spacer layer, the upper spacer layer or the upper DBR layer contains AlGaAsP, where the lattice constant of AlGaAsPis greater than that of the GaAs substrate. This can moderately reduce excessive compressive strain due to lattice mismatch or avoid tensile strain during the epitaxial growth, thereby reducing the chance of deformation and bowing of the VCSEL epitaxial wafer or cracking during manufacturing. Additionally, the VCSEL epitaxial layer can be prevented from generating excessive compressive strain or tensile strain during the epitaxial growth.

Vertical cavity surface emitting laser diode (VCSEL) having AlGaAsP layer with compressive strain

A measurement method for a vertical cavity surface emitting laser diode (VCSEL) and an epitaxial wafer test fixture are provided, especially the Fabry-Perot Etalon of the bottom-emitting VCSEL can be measured. When the Fabry-Perot Etalon of the bottom-emitting VCSEL is measured by a measurement apparatus, a light of the test light source of the measurement apparatus is incident from the substrate surface of the VCSEL epitaxial wafer such that the Fabry-Perot Etalon of the bottom-emitting VCSEL is acquired. Through the VCSEL epitaxial wafer test fixture, the bottom-emitting VCSEL can be directly measured by the existing measurement apparatus such that there is no need to change the optical design of the measurement apparatus, and it can prevent the VCSEL epitaxial wafer from being scratched or contaminated.

Measurement method of reflection spectrum of vertical cavity surface emitting laser diode (VCSEL) and epitaxial wafer test fixture

A laser diode is provided, including at least a defect blocking layer deposited between the GaAs substrate and the active layer, so that the crystal defects of the GaAs substrate can be blocked or reduced from propagation to the active layer when the epitaxial layer is formed on the GaAs substrate. As such, the crystal quality of the active layer can be improved, thereby improving the reliability and optical property of the laser diode.

Laser diode with defect blocking layer

Provided is a high ruggedness HBT, including a first emitter cap layer and a second emitter cap layer formed between an emitter layer and an ohmic contact layer, or only an emitter cap layer is formed between them. When the first and second emitter cap layers are provided, bandgaps of the first or second emitter cap layer are changed, and the ruggedness of the HBT is improved. When an emitter cap layer is provided, an electron affinity of at least a portion of the emitter cap layer is less than or approximately equal to an electron affinity of the emitter layer, and the ruggedness of the HBT is improved.

High ruggedness heterojunction bipolar transistor

The disclosure provides a high ruggedness HBT structure, including: a sub-collector layer on a substrate and formed of an N-type III-V semiconductor material; a collector layer on the sub-collector layer and formed of a III-V semiconductor material; a base layer on the collector layer and formed of a P-type III-V semiconductor material; an emitter layer on the base layer and formed of one of N-type semiconductor materials of InGaP, InGaAsP and InAlGaP; a first emitter cap layer on the emitter layer and formed of one of undoped or N-type semiconductor materials of AlGaAs, AlGaAsN, AlGaAsP, AlGaAsSb, and InAlGaAs, x having a highest value between 0.05&#x2264;x&#x2264;0.4, and y, z, r, w&#x2264;0.1; a second emitter cap layer on the first emitter cap layer and formed of an N-type III-V semiconductor material; and an ohmic contact layer on the second emitter cap layer and formed of an N-type III-V semiconductor material.

High ruggedness heterojunction bipolar transistor structure

Provided is a heterojunction bipolar transistor (HBT) structure with a bandgap graded hole barrier layer, including: a sub-collector layer including an N-type group III-V semiconductor on a substrate, a collector layer on the sub-collector layer and including a group III-V semiconductor, a hole barrier layer on the collector layer, a base layer on the hole barrier layer and including a P-type group III-V semiconductor, an emitter layer on the base layer and including an N-type group III-V semiconductor, an emitter cap layer on the emitter layer and including an N-type group III-V semiconductor, and an ohmic contact layer on the emitter cap layer and including an N-type group III-V semiconductor. Bandgaps of the hole barrier layer at least include a gradually increasing bandgap from the base layer towards the collector layer and a largest bandgap of the hole barrier layer is greater than bandgap of the base layer.

Heterojunction bipolar transistor structure with a bandgap graded hole barrier layer

The disclosure provides an HBT structure with bandgap graded hole barrier layer, comprising: a sub-collector layer, a collector layer, a hole barrier layer, a base layer, an emitter layer, an emitter cap layer, and an ohmic contact layer, all stacked sequentially on a substrate; with the hole barrier layer formed of at least one of AlGaAs, AlGaAsN, AlGaAsP, AlGaAsSb, and InAlGaAs, Aluminum composition being less than 22%, and In, N, P, and Sb compositions being respectively less than or equal to 10%; wherein bandgaps of the hole barrier layer at least comprise a gradually increasing bandgap from the base layer towards the collector layer and the largest bandgap of the hole barrier layer is greater than bandgaps of the base layer and the collector layer.

A directed epitaxial heterojunction bipolar transistor (HBT) structure is directly or indirectly formed on a GaAs substrate that is formed by a (100) face towards a (111)B face with an angle of inclination between 0.6&#xb0; and 25&#xb0;, and includes a sub-collector layer, a collector, a base layer, an emitter layer, an emitter cap layer and an ohmic contact layer, which are sequentially formed on the substrate. A tunnel collector layer formed by InGaP or InGaAsP is provided between the collector layer and the base layer. Since an epitaxial process is performed on the substrate from a (100) face towards a (111)B face with an angle of inclination between 0.6&#xb0; and 25&#xb0;, indium and gallium contained in InGaP or InGaAsP are affected by the ordering effect such that InGaP or InGaAsP used in the emitter layer and/or the tunnel collector layer has a higher electron affinity or a smaller bandgap.

Growing community of inventors

Taoyuan, Taiwan

Yu-Chung Chin