Taiwan Semiconductor Manufacturing Comp. Ltd.

Etron Technology, Inc.

Yu-Chiun Lin

Po-Nien Chen

Chung-Chieh Yang

Chih-Yung Lin

Chung-Peng Hsieh

Chia-Hsin Hu

Chen Hua Tsai

Yi-Hsuan Chung

Kuo-Cyuan Kuo

Hsuan-Ching Chao

Cheng-Pin Huang

Ming-Kia Chen

Chia-Chun Chiang

A semiconductor device includes a substrate having a first conductivity type, a first well formed in the substrate and having a second conductivity type, a first diffusion region formed in the first well and having the first conductivity type, a first interlayer dielectric layer disposed over the first well and the first diffusion region, and a resistor wire formed of a conductive material and embedded in the first interlayer dielectric layer. The resistor wire overlaps the first diffusion region and at least partially overlaps the first well in plan view.

Semiconductor device and a method of fabricating the same

A semiconductor device includes a dummy fin structure disposed over a substrate, a dummy gate structure disposed over a part of the dummy fin structure, a first interlayer dielectric layer in which the dummy gate structure is embedded, a second interlayer dielectric layer disposed over the first interlayer dielectric layer, and a resistor wire formed of a conductive material and embedded in the second interlayer dielectric layer. The resistor wire overlaps the dummy gate structure in plan view.

Semiconductor device and a method for fabricating the same

A circuit for simultaneously analyzing performance and bugs includes a mapping unit and a USB 3.0 data flow analyzer. The mapping unit is used for mapping commands transmitted to a USB 3.0 host through a peripheral component interconnect express and internal events of the USB 3.0 host to a packet of a USB 3.0 bus. The USB 3.0 data flow analyzer is used for analyzing performance and bugs of the USB 3.0 host through the packet of the USB 3.0 bus.

Circuit for simultaneously analyzing performance and bugs and method thereof

An equalizer includes an oversampling logic unit, a direct current setting unit, and an alternating current setting unit. The oversampling logic unit oversamples data from a channel to generate a plurality of direct current terms and a plurality of alternating current terms according to an oversampling clock, and outputting a plurality of direct current terms corresponding to an output clock and a plurality of alternating current terms corresponding to the output clock according to the output clock. The direct current setting unit adjusts a direct current setting of the equalizer according to a plurality of direct current terms inputted by the oversampling logic unit within a first predetermined time. And the alternating current setting unit adjusts an alternating current setting of the equalizer according to a plurality of alternating current terms inputted by the oversampling logic unit within the first predetermined time.

Equalizer and method of equalizing signals

Growing community of inventors

Taipei, Taiwan

Yu-Chiun Lin