Taiwan Semiconductor Manufacturing Comp. Ltd.

Yu-Chien Chiu

Meng-Han Lin

Han-Jong Chia

Chun-Fu Cheng

Feng-Cheng Yang

Zhiqiang Wu

Sheng-Chen Wang

Chung-Wei Wu

Sai-Hooi Yeong

Yu-Ming Lin

Mauricio Manfrini

Chih-Yu Chang

Chia-Ta Yu

Ya-Yun Cheng

Hung-Wei Li

Chun-fu Cheng

Wen-Ling Lu

Various embodiments of the present disclosure provide a memory device and methods of forming the same. In one embodiment, a memory device is provided. The memory device includes a gate electrode disposed in an insulating material layer, a ferroelectric dielectric layer disposed over the gate electrode, a metal oxide semiconductor layer disposed over the ferroelectric dielectric layer, a source feature disposed over the metal oxide semiconductor layer, wherein the source feature has a first dimension, and a source extension. The source extension includes a first portion disposed over the source feature, wherein the first portion has a second dimension that is greater than the first dimension. The source extension also includes a second portion extending downwardly from the first portion to an elevation that is lower than a top surface of the source feature.

Ferroelectric device and methods of forming the same

A semiconductor memory device includes a stack of alternating insulating layers and first conductive layers disposed over a substrate; a plurality of memory cell strings penetrating the stack over the substrate, each memory cell string comprising a central portion extending through the stack, a semiconductor layer surrounding the central portion, and a ferroelectric layer surrounding the semiconductor layer, and the central portion comprising a channel isolation structure and a second conductive layer and a third conductive layer at two sides of the channel isolation structure; and a plurality of cell isolation structures penetrating the conductive layers and the insulating layers over the substrate and disposed between two memory cell strings, each cell isolation structure comprising a top portion and a bottom portion adjoined to the top portion and different from the top portion.

Semiconductor memory device and manufacturing method thereof

A three-dimensional memory device and a manufacturing method thereof are provided. The three-dimensional memory device includes first and second stacking structures, isolation pillars, gate dielectric layers, channel layers and conductive pillars. The stacking structures are laterally spaced apart from each other. The stacking structures respectively comprises alternately stacked insulating layers and conductive layers. The isolation pillars laterally extend between the stacking structures. The isolation pillars further protrude into the stacking structures, and a space between the stacking structures is divided into cell regions. The gate dielectric layers are respectively formed in one of the cell regions, and cover opposing sidewalls of the stacking structures and sidewalls of the isolation pillars. The channel layers respectively cover an inner surface of one of the gate dielectric layers. The conductive pillars are separately located within the cell regions, and are laterally surrounded by the channel layers.

Three-dimensional memory device and manufacturing method thereof

Growing community of inventors

Hsinchu, Taiwan

Yu-Chien Chiu