Mediatek Corporation

Hfi Innovation Inc.

Cadence Design Systems, Inc.

Synopsys, Inc.

Synopsys Taiwan Co., Ltd.

Yu-Chi Su

Ching-Yeh Chen

Tzu-Der Chuang

Yu-Wen Huang

Chih-Wei Hsu

Chen-Yen Lai

Yuan-Kai Pei

Jan Klopp

Chun-Chia Chen

Chia-Ming Tsai

Arnold Ginetti

Han Huang

Zhi-Yi Lin

Yu-Ling Hsiao

Hsiao-Tzu Lu

Ming-I Lai

Min-Yi Fang

Kai-Jyun Nian

Zhen-Min Wu

Shun-Chin Chang

Wei-Cheng Chen

A method and apparatus of encoding or decoding for a coding system, where bi-directional CU (coding unit) weighting (BCW) is enabled for the coding system to allow using multiple pairs of weights, are disclosed. According to this method, a Merge candidate list is generated for the current block, where current bi-directional CU weights for a bi-directional predictor of the current block associated with a target Merge candidate in the Merge candidate list are set to a pre-define pair of weights when the target Merge candidate corresponds to a selected Merge candidate. In another method, current bi-directional CU weights for a bi-directional predictor associated with a target Merge candidate in the Merge candidate list are inherited from the target Merge candidate when the target Merge candidate corresponds to a selected Merge candidate.

Method and apparatus of video coding using bi-directional CU weight

Aspects of the disclosure provide a method and an apparatus for video coding. A processing circuitry determines a process unit size for a decoder-side motion vector refinement (DMVR). Then, the processing circuitry enables an application of the DMVR on a current block when a size of the current block is smaller than or equal to the process unit size; and disables the application of the DMVR on the current block when the size of the current block is larger than the process unit size. In an example, the application of the DMVR refines the motion vectors with or without a template block.

Method and apparatus for video coding

Methods and apparatus for in-loop processing of reconstructed video are disclosed. According to one method, a virtual boundary is determined for to-be-processed pixels in the current picture, where the virtual boundary is aligned with block boundaries and at least one to-be-processed pixel on a first side of the virtual boundary requires one or more second pixels on a second side of the virtual boundary. According to the method, the in-loop processing is modified if a target to-be-processed pixel requires at least one second pixel from the second side of the virtual boundary and the modified in-loop processing eliminates the need for any second pixel on the second side of the virtual boundary. According to another method, the operations of block classification are changed when part of the required pixels in one 10&#xd7;10 window used in classification are at the other side of virtual boundaries.

Method and apparatus for reduction of in-loop filter buffer

In one method, the current block is partitioned into multiple final sub-blocks using one or more stages of sub-tree partition comprising ternary tree partition and at least one other-type partition, where ternary partition tree is excluded from the sub-tree partition if a current sub-tree depth associated with a current sub-block is greater than a first threshold and the first threshold is an integer greater than or equal to 1. In another method, if a test condition is satisfied, the current block is encoded or decoded using a current Inter mode selected from a modified group of Inter tools, where the modified group of Inter tools is derived from an initial group of Inter tools by removing one or more first Inter tools from the initial group of Inter tools, replacing one or more second Inter tools with one or more complexity-reduced Inter tools, or both.

Method and apparatus of optimized splitting structure for video coding

A method and apparatus of video encoding video coding for a video encoder or decoder using Neural Network (NN) are disclosed. According to this method, the multiple frames in a video sequence comprises multiple segments, where each of the multiple segments comprises a set of frames. The NN (Neural Network) processing is applied to a target signal in one or more encoded frames of a target segment in the encoder side or to the target signal in one or more decoded frames of the target segment in the decoder side using one NN parameter set for the target segment. The target signal may correspond to reconstructed residual, reconstructed output, de-blocked output, SAO (sample adaptive offset) output, ALF (adaptive loop filter) output, or a combination thereof. In another embodiment, the NN processing is applied to a target signal only in one or more specific encoded or decoded frames.

Method and apparatus of neural network for video coding

Exemplary video processing methods and apparatuses for encoding or decoding a current block by bi-directional prediction. Multiple weight sets are utilized for blending List 0 and List 1 predictors, and the selection among multiple weight sets may be implicitly determined based on video information. Each weight set is composed of multiple candidate weights, and one candidate weight is selected for the current block. A weight pair associated with the selected weight for the current block is used for weighted averaging List 0 and List 1 predictors of the current block to generate a final inter predictor. The video processing methods and apparatuses encode or decode the current block according to the final inter predictor of the current block.

Methods and apparatuses of video processing with bi-direction prediction in video coding systems

Method and apparatus of video encoding video coding for a video encoder or decoder using Neural Network (NN) are disclosed. According to one method, input data or a video bitstream are received for blocks in one or more pictures, which comprise one or more colour components. The residual data, prediction data, reconstructed data, filtered-reconstructed data or a combination thereof is derived for one or more blocks of said one or more pictures. A target signal corresponding to one or more of the about signal types is processed using a NN (Neural Network) and the input of the NN or an output of the NN comprises two or more colour components. According to another method, A target signal corresponding to one or more of the about signal types is processed using a NN and the input of the NN or an output of the NN comprises two or more colour components.

The present disclosure relates to a method for use with an electronic design. Embodiments may include performing, using a processor, an electronic design process on a portion of an electronic design. Embodiments may also include automatically monitoring the electronic design process on a periodic basis using a pulse monitor to acquire one or more sampling results and storing the one or more sampling results. Embodiments may further include providing, during the electronic design process, the one or more sampling results to a graphical user interface.

System and method for automatic performance analysis in an electronic circuit design

Method and apparatus of using Bi-directional optical flow (BIO) for a true bi-direction predicted block are disclosed. According to one method of the present invention, the gradients are limited to a predefined bit-depth in order to reduce the computational complexity. According to another method, the data range of gradient sum and/or the difference between L0 and L1 interpolated pixels are shifted by a predefined bit-depth. The pre-defined bit-depth can be implicitly determined or signalled in a bit stream at a sequence level, picture level or slice level. The pre-defined bit-depth can also be determined dependent on input bit-depth.

Method and apparatus of bi-directional optical flow for video coding

Methods and apparatus for video coding using ringing smoothing filter (RSF) are disclosed. According to one method, ringing smoothing filter (RSF) is applied to the reconstructed residuals to form smoothed reconstructed residuals or applied to an in-loop-filtered reconstructed block to form a smoothed-filtered reconstructed block for the current block, where the RSF corresponds to an edge-preserving filter. The ringing smoothing filter (RSF) may correspond to a bilateral filter. According to another method, adaptive RSF is derived based on information comprising Intra prediction mode or Inter prediction mode. In yet another method, whether to apply ringing smoothing filter (RSF) to a current block in the current image is determined based on one or more control flags. If the control flag(s) indicates the RSF being on for the current block, the RSF is applied to the current block.

Method and apparatus of smoothing filter for ringing artefact removal

Disclosed are techniques for implementing electronic design layouts with symbolic representations. These techniques determine an abstraction scope of a layout circuit component in a layout of an electronic design by referencing a user input or one or more default settings of the abstraction mechanism and identify first data that are included in or associated with a schematic symbol for the layout circuit component by traversing data from a symbolic representation data source with reference to the abstraction scope with the layout editing mechanism. In addition, these techniques further generate a symbolic representation for the layout circuit component by reproducing at least some of the first data in the layout and perform one or more layout operations on the symbolic representation to improve the layout and to generate a result set for the one or more layout operations.

Methods, systems, and computer program product for implementing electronic design layouts with symbolic representations

A computer-implemented method is disclosed for layout pattern or layout constraint reuse by identifying sub-circuits with identical or similar schematic structure based on a topology comparison strategy. The selected sub-circuit is transformed into a topology representing the relative positions among the instances of the selected sub-circuit. Based on the topology, one or more sub-circuits with identical or similar topologies in a predefined scope of a schematic are recognized and identified. Accordingly, the layout or the layout constraint of the selected sub-circuit is copied and associated to each of the identified sub-circuits. Furthermore, once the sub-circuits are identified, they can be listed on a user interface with notations to allow users to confirm each of the identified sub-circuits respectively.

Method of schematic driven layout creation

Systems, apparatus and methods for handling verification violations are disclosed. In one aspect, a method stores a list of fix information in addition to geometric shapes for each layer during verification, such as design rule checking For each primitive operation step performed during verification, two tasks are performed. First, if the primitive operation is a dimensional checking operation (i.e., width, spacing or enclosure), then for each violation, the first task creates fix information containing violation edge pairs and adds the created fix information to the fix information list on the output layer. Second, for all operations and after the output shapes on the output layer are generated, a second task passes the fix information on input layers which overlap any output shape of the output layer to the output layer's fix information list. Finally, fix guides for the final violation results are generated and drawn based on the final fix information list.

Growing community of inventors

Hsinchu, Taiwan

Yu-Chi Su