Mstar Semiconductor, Inc.

Yu-Che Su

Tai-Lai Tung

Kuan-Chou Lee

Yi-Ying Liao

Chia-Wei Chen

Wen-Chieh Yang

Teng-Han Tsai

Tzu-Hsuan Huang

Jia-Hong Huang

A symbol decision method includes: storing a look-up table (LUT) to a symbol decision circuit; receiving a first signal, and generating a coordinate signal set corresponding to the first signal according to the first signal, wherein the coordinate signal set is located in a first decision region; and reading the LUT according to the coordinate signal set to output a first symbol corresponding to the first signal, wherein the first symbol is a first constellation point corresponding to the first decision region.

Method and device for symbol decision and digital receiver

A receiving circuit capable of estimating frequency offset includes a front circuit and a calculation circuit. The front circuit receives a remote signal to generate a received signal. The calculation circuit includes: an exponentiation module, calculating an exponent of a power to generate a high-order signal; a frequency-domain transform module, performing frequency-domain transform on the high-order signal to generate a spectrum; a peak searching module, searching for a peak of the amplitude of the spectrum to generate a peak coordinate value reflecting a frequency where the peak occurs; an offset estimating module, adding the peak coordinate value with a compensation value to generate a sum, dividing the sum by a first divisor to generate a remainder, subtracting the compensation value from the remainder to generate a difference, and dividing the difference by a second divisor to generate an offset estimation value reflecting the frequency offset.

Receiving circuit for estimating frequency offset and associated method

A bit allocation device includes: a channel estimation unit, performing a channel estimation to generate a plurality of channel qualities of a plurality of subcarriers; a processing unit, coupled to the channel estimation unit, generating a first plurality of bit numbers of the plurality of subcarriers according to the plurality of channel qualities; and a control unit, coupled to the processing unit, generating a second plurality of bit numbers of the plurality of subcarriers according to the first plurality of bit numbers and an upper limit of a total bit number.

Device and method for handling bit allocation

A stereo-phonic frequency modulation receiver includes: a frequency modulation demodulation circuit, receiving a reception signal, and generating a demodulated signal according to the reception signal; a frequency-division demultiplexer, generating a sum signal, a difference signal and a pilot amplitude signal according to the demodulated signal; a dual sound channel separation circuit, generating a left-channel output signal and a right-channel output signal according to the sum signal and a weakened difference signal; and a weakening circuit, weakening the difference signal according to the pilot amplitude signal or a signal-to-noise ratio (SNR) to generate the weakened difference signal.

Stereo-phonic frequency modulation receiver and method for separating dual sound channels

A signal detection method includes: retrieving a first period component of a signal and at least one second period component adjacent to the first period component; squaring a subtraction result of the first period component and each of the at least one second period component to calculate at least one first square value to further obtain a first detection parameter; squaring an addition result of the first period component and each of the at least one second period component to calculate at least one second square value to further obtain a second detection parameter; dividing the second detection parameter by the first detection parameter to obtain a detection function; determining that the signal is detected when the value of the detection function is greater than or equal to a threshold, or else determining that the signal is not detected.

Signal detection method and device

A frequency modulation receiver includes a frequency modulation demodulation circuit that generates a first signal, and a phase locked loop (PLL) circuit coupled to the frequency modulation demodulation circuit to receive the first signal. The PLL circuit includes: a voltage-controlled oscillator (VCO), generating an oscillation output signal according to a filtered output signal; a phase detector, coupled to the VCO, generating a phase signal according to the oscillation output signal and the first signal; and a proportional-integral-derivative (PID) filter, coupled to the VCO and the phase detector, receiving the phase signal and generating the filtered output signal to the VCO.

Frequency modulation receiver and frequency modulation receiving method

An apparatus for estimating carrier frequency offset for multipath signals includes an echo signal filtering circuit, an Mpower circuit, a spectrum generating circuit, a peak frequency determining circuit and a frequency offset determining circuit. The echo signal filtering circuit filters out an echo signal from an input signal to generate a filtered signal. The Mpower circuit performs an Mpower calculation on the filtered signal to generate an Mpower calculation result. The spectrum generating circuit generates an Mpower spectrum according to the Mpower calculation result. The peak frequency determining circuit determines a peak frequency corresponding to an amplitude peak from the Mpower spectrum. The frequency offset determining circuit determines an estimated carrier frequency offset according to the peak frequency.

Apparatus and method for estimating carrier frequency offset for multipath signals

An apparatus for estimating carrier frequency offset includes an Mpower circuit, a spectrum generating circuit, a peak frequency determining circuit and a frequency offset determining circuit. The Mpower circuit performs an Mpower calculation on an input signal to generate an Mpower calculation result. The spectrum generating circuit generates an Mpower spectrum according to the Mpower calculation result. The peak frequency determining circuit determines a peak frequency corresponding to an amplitude peak from the Mpower spectrum. The frequency offset determining circuit determines an estimated carrier frequency offset according to the peak frequency.

Apparatus and method for estimating carrier frequency offset

A signal receiver with adaptive software information adjustment of a communication system is provided. The signal receiver receives a modulated signal comprising a plurality of packets, and includes: a demodulating circuit, configured to demodulate the modulated signal to generate a plurality of sets of soft information corresponding to each packet; a software information adjusting circuit, coupled to the demodulating circuit, configured to adjust the sets of soft information according to a distribution of the sets of soft information corresponding to each packet; a quantizer, coupled to the soft information adjusting circuit, configured to quantize the adjusted sets of soft information to generate a plurality of sets of data; and a decoder, coupled to the quantizer, configured to decode the data.

Signal receiver with adaptive soft information adjustment and associated signal processing method

A wireless system including a decoding module, an estimating module and a searching module is provided. The decoding module receives and decodes a packet to generate a decoding result. The estimating module retrieves package length information from the decoding result, and estimates a transmission end time of the packet according to the packet length information. The searching module determines a search start time according to the transmission end time, and starts packet searching at the search start time.

Wireless receiving system and signal processing method thereof

A signal receiving apparatus, applicable in a wireless system calibrating direct current offset, includes: an adjusting circuit arranged to receive an receiving signal having a first DC (Direct Current) signal, and adjust the first DC signal to generate the receiving signal having a second DC signal according to an adjusting signal; a first arithmetic circuit arranged to generate an error signal according to the second DC signal and a target DC signal; and a second arithmetic circuit arranged to calculate an error signal slope according to the error signal, and update the adjusting signal according to the error signal slope and the error signal.

Signal receiving apparatus and signal receiving method

A capacitance detection apparatus for a touch panel includes an N number of capacitors. The detection apparatus generates an N number of different input signals, and provides an iinput signal of the input signals to an icapacitor. The N number of input signals correspond to a delayed sequence of a maximum length sequence or the maximum length sequence. The detection apparatus sums up an N number of response signals, which are generated after providing the N number of input signals to the N number of capacitors, to generate a summed signal. The summed signal is multiplied by the iinput signal and integrated to generate an iintegrated signal. The detection apparatus estimates capacitance values of the N number of capacitors according to the N number of integrated signals, respectively.

Growing community of inventors

Hsinchu Hsien, Taiwan

Yu-Che Su