Taiwan Semiconductor Manufacturing Comp. Ltd.

Pixart Imaging Incorporated

Other

Yu Chao Lin

Chao-Cheng Chen

Ryan Chia-Jen Chen

Tung Ying Lee

Ming-Ching Chang

Shao-Ming Yu

Yih-Ann Lin

Jr Jung Lin

Chia-Hao Hsu

Chih-Tang Peng

Chun-Hung Lee

Lain-Jong Li

Yu-Sheng Chen

Hsin-Yi Tsai

Tse-An Chen

Tzu-Ang Chao

Jih-Jse Lin

Shun-Hui Yang

Gregory Michael Pitner

Jui-Ming Chen

Bao-Ru Young

Chia-Jen Chen

Tzung-Chi Fu

Kuo-Tai Huang

Chia-Chen Chen

Hao-Ming Lien

Ming-Jie Huang

Bo-Jiun Lin

Chih Hsin Lin

Yi-Hsing Chen

Kuo-Yu Wu

Yu-Lung Yang

Tzu-Wei Kao

Yuan-Ming Chiu

I-Yin Lu

Chih-Han Lin

Carlos H Diaz

Kong-Beng Thei

Tzu-Chiang Chen

Weng Chang

Chien-Hao Chen

Harry Chuang

Cheng-Han Wu

De-Fang Chen

Wei-Sheng Yun

Chia-Wei Chang

Jau-Yi Wu

Hsin Chia Chen

Yuan-Sheng Huang

Yi-Shien Mor

Tzung Min Su

Tzu-Yen Hsieh

Wei-Che Hsieh

Ming-Chia Tai

Su-Chen Lai

Gary Shen

Cheng Nan Tsai

Eric Chih-Fang Liu

Teng Wei Hsu

Hui Hsuan Chen

Kerem Akarvardar

Yuan Yu Peng

Chun Yi Lu

Hung Ching Lai

Joseph Lin

Weng Cheng

Yuan-Min Chiu

Tsung Min Su

Chuan Ching Lin

In an embodiment, a device includes: a first metallization layer over a substrate, the substrate including active devices; a first bit line over the first metallization layer, the first bit line connected to first interconnects of the first metallization layer, the first bit line extending in a first direction, the first direction parallel to gates of the active devices; a first phase-change random access memory (PCRAM) cell over the first bit line; a word line over the first PCRAM cell, the word line extending in a second direction, the second direction perpendicular to the gates of the active devices; and a second metallization layer over the word line, the word line connected to second interconnects of the second metallization layer.

Phase-change memory devices

A method includes forming a dielectric layer over a substrate, the dielectric layer having a top surface; etching an opening in the dielectric layer; forming a bottom electrode within the opening, the bottom electrode including a barrier layer; forming a phase-change material (PCM) layer within the opening and on the bottom electrode, wherein a top surface of the PCM layer is level with or below the top surface of the dielectric layer; and forming a top electrode on the PCM layer.

Phase-change memory device and method

A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

Method of manufacturing semiconductor devices including the steps of removing one or more of the nanotubes from the stack of nanotubes, and/or removing spacers that surrounds each of the plurality of nanotubes, and forming gate dielectric and/or gate electrode to the nanotubes

A semiconductor structure includes a first dielectric layer, an electrode in the first dielectric layer, a second dielectric layer in the electrode, and a phase change material over the first dielectric layer, the electrode, and the second dielectric layer. According to some embodiments, an uppermost surface of the electrode is at least one of above an uppermost surface of the first dielectric layer, above an uppermost surface of the second dielectric layer, or above a lowermost surface of the phase change material.

Semiconductor structure and method of manufacture

An embodiment is a method including forming an opening in a mask layer, the opening exposing a conductive feature below the mask layer, forming a conductive material in the opening using an electroless deposition process, the conductive material forming a conductive via, removing the mask layer, forming a conformal barrier layer on a top surface and sidewalls of the conductive via, forming a dielectric layer over the conformal barrier layer and the conductive via, removing the conformal barrier layer from the top surface of the conductive via, and forming a conductive line over and electrically coupled to the conductive via.

Interconnect structure and method

Method of manufacturing semiconductor devices including the steps of removing a plurality of spacers that surrounds each of the plurality of nanotubes into a layer of nanotubes, and forming gate dielectric and/or gate electrode

In some embodiments, the present disclosure relates to a method of forming an integrated chip that includes depositing a phase change material layer over a bottom electrode. The phase change material is configured to change its degree of crystallinity upon temperature changes. A top electrode layer is deposited over the phase change material layer, and a hard mask layer is deposited over the top electrode layer. The top electrode layer and the hard mask layer are patterned to remove outer portions of the top electrode layer and to expose outer portions of the phase change material layer. An isotropic etch is performed to remove portions of the phase change material layer that are uncovered by the top electrode layer and the hard mask layer. The isotropic etch removes the portions of the phase change material layer faster than portions of the top electrode layer and the hard mask layer.

Method to effectively suppress heat dissipation in PCRAM devices

Semiconductor devices and methods of manufacture

In some embodiments, the present disclosure relates to an integrated chip including a phase change material disposed over a bottom electrode and configured to change from a crystalline structure to an amorphous structure upon temperature changes. A top electrode is disposed over an upper surface of the phase change material. A via electrically contacts a top surface of the top electrode. Further, a maximum width of the upper surface of the phase change material is less than a maximum width of a bottom surface of the phase change material.

A method includes forming a coating layer in a dry etching chamber, placing a wafer into the dry etching chamber, etching a metal-containing layer of the wafer, and moving the wafer out of the dry etching chamber. After the wafer is moved out of the dry etching chamber, the coating layer is removed.

Methods for removing particles from etching chamber

Growing community of inventors

Hsinchu, Taiwan

Yu Chao Lin