Sharp Kabushiki Kaisha Corporation

Yousuke Nakagawa

Kazuhiro Maeda

Sachio Tsujino

Hiroaki Sugiyama

Yasuhiro Sugita

Ichiro Shiraki

Shuji Nishi

Nobuhiro Kuwabara

Ichiroh Shiraki

A retention unit which retains input data, and a light emission control unit which compensates a value of a drive current that flows to a light emission element based on the input data which is retained in the retention unit, are provided in each pixel unit of a display device. While the light emission control unit displays input data of an image of an Nth frame during a light emission period TL (N) by driving the light emission element, input data of an image of an (N+1)th frame is written to the retention unit which becomes a pair together with the light emission control unit, as processing in a write processing period TS (N+1) of the (N+1)th frame.

Drive circuit, display device and driving method

Upon each detection of an image switch by a display switch detection portion () included in a display control circuit (), a selection frequency determination portion () makes a determination for each row corresponding to a scanning signal line as to whether or not the row includes any pixel with a middle tone. Further, a scanning signal output control portion () performs drive control such that any scanning signal line corresponding to a row without such a pixel is selected at intervals of one frame period. This results in reduced power consumption in selecting the scanning signal lines.

Display device and display method

A pulse generation circuit is configured with a plurality of transistors of a single conductivity type. The pulse generation circuit includes: an output unit including a current limiting element configured to supply, by a predetermined current, a first voltage from a first power supply line supplied with the first voltage to an output terminal, the output unit being configured to perform a bootstrap operation that outputs the first voltage to the output terminal in response to a received input signal; and an output control unit configured to initiate the bootstrap operation when the output terminal transitions to the first voltage, and after the output terminal transitions to the first voltage, terminate the bootstrap operation and perform control so as to output the first voltage from the current limiting element to the output terminal.

Pulse generation circuit, shift register circuit, and display device

When there are a plurality of rows with the same display content, a scanning order calculating portion () provided in a display control circuit () determines addresses sequentially such that scanning signal lines corresponding to the rows are selected at the same time. A scanning order setting portion () controls an address output portion () such that the scanning signal lines are selected in such an order, and also controls digital image signals DV outputted by output frame memory (). In this case, the number of changes in potential for video signal lines can be reduced by the number of rows selected at the same time, resulting in reduced power consumption for driving the video signal lines.

In a method of operating an optical sensor circuit () in accordance with one embodiment of the present invention, main reset is performed prior to sensing of incident light with use of a PIN diode () and, between the main reset and next main reset, auxiliary reset is performed so that a potential of a cathode terminal of the PIN diode () is reduced within a predetermined range within which storage of carriers is not induced in an intrinsic region of the PIN diode ().

Method for operating optical sensor circuit, and method for operating display apparatus provided with optical sensor circuit

Provided is a touch panel-equipped display device () including: a touch panel (); a display part () including source bus lines (); a source bus line potential switching part that switches the potential of each source bus line () in a source bus line potential switching period () that is a partial period of a vertical blanking period (); and a sensing part that performs sensing for a touch panel in a sensing period () that is a period in the vertical blanking period () other than the partial period.

Touch panel equipped display device and control method for same

The touch panel () of the present invention includes a plurality of driver electrodes (), a plurality of detection electrodes () that extend in the column direction, and a complementary electrode (), which extends in the direction in which the driver electrodes extend, and which forms a parasitic capacitance that corresponds to capacitance components that are not affected during detection of an object to be detected that comes into contact with or approaches the detection surface among the parasitic capacitances formed in the gaps between the driver electrodes () and the detection electrodes (), in the gap from the detection electrodes ().

Touch panel and display device provided with same

The touch panel of the present invention is a touch panel () that applies drive signals to drive electrodes () and carries out detection on the basis of the variation in the amount of charge that has been induced on detection electrodes (), and is configured such that when drive signals are being applied to the drive electrodes, complementary signals having a different phase from the drive signals are applied to complementary electrodes (), and the complimentary electrodes () are configured such that the amplitude (&#x394;Vcm) of the complimentary signals satisfies the following formula:&#x394;&#xd7;()/

By reducing the potential drop of a storage node that occurs due to feedthrough, the capacitance of a storage capacitor is reduced and sensor sensitivity is improved. In a photosensor, the first terminal of a storage capacitor (C) and the gate of a MOS transistor (M), which outputs a signal in accordance with the potential of a storage node (N), are connected to the storage node (N). A forward biased pulse voltage is supplied to the anode of a first photodiode (DS) in a reset period, and a reverse biased voltage is supplied to the anode of the first photodiode in a storage period and a readout period. A reverse biased voltage is supplied to the anode of a second photodiode (DM) in all operation periods. A voltage that keeps the potential of the storage node lower than the threshold value of the MOS transistor (M) is supplied to the second terminal of the storage capacitor in the reset period and the storage period, and a voltage that thrusts the potential of the storage node (N) upward to the threshold value of the MOS transistor (M) or higher is supplied to the second terminal of the storage capacitor in the readout period.

Photosensor operating in accordacne with specific voltages and display device including same

In a counter circuit of a control signal generating circuit, a selector circuit selects under control which is in accordance with a selector circuit control signal (CTR) a predetermined one in a signal VSYNC and a signal HSYNC, which are pulse signals, so as to input a pulse signal thus selected to a counter. The counter outputs a counted result of pulses of the inputted pulse signal. By use of the counted result, a VSYNC synchronization signal generating circuit or an HSYNC synchronization signal generating circuit generates a control signal to control the driving of image display.

Counter circuit, control signal generating circuit including the counter circuit, and display apparatus

The present invention aims to provide a monolithic driver-type display device capable of reducing circuit scale of a sampling circuit, and keeping low power consumption by directly driving a source driver with an externally provided video signal. In the monolithic driver-type display device having a display portion for displaying video and circuits for driving the display portion formed on the same insulating substrate, a plurality of sampling switches are provided in association with a plurality of pieces of bit data contained in externally inputted digital video signals. The sampling switches are opened/closed based on sampling signals, thereby sampling the digital video signals for each piece of the bit data and converting the signals into parallel format for output to data lines. The outputted digital video signals charge parasitic capacitances on the data lines and are held therein.

Growing community of inventors

Osaka, Japan

Yousuke Nakagawa