Samsung Electronics Co., Ltd.

Yonsei University

Graz University of Technology

Youngsam Shin

Wonjong Lee

Seokjoong Hwang

Jaedon Lee

Yeongon Cho

Deok Jae Oh

Sangoak Woo

Dong-hoon Yoo

Sunmin Kwon

Jeongsoo Park

Seongwook Park

Jinwoo Kim

Minwoo Lee

Dong-Hoon Yoo

Hoiju Chung

Yongmin Tai

Ahmet Can Mert

Sujoy Sinha Roy

JeongSoo Park

Young-Hwan Heo

Aikata

Tackdon Han

A memory management method based on a compressed memory and an apparatus using the same are provided. A memory device includes a memory and a near memory processing unit. The memory includes a normal memory area for storing uncompressed data and a compressed memory area for storing compressed data. The near memory processing unit is configured to receive a first command to frontswap-store a huge page, which is stored in the normal memory area, in the compressed memory area; identify addresses of sub-pages of the huge page based on an address of the huge page; compress the sub-pages using the addresses of the sub-pages to generate compressed sub-pages; and store the compressed sub-pages in the compressed memory area. A size of the huge page is larger than a regular page.

Memory management method based on compressed memory and apparatus using the same

Disclosed are apparatuses and methods with crypto processing. Computing devices may be interconnected to each other. Each computing device may be configured to perform polynomial operations based on homomorphic encryption. Memories may be configured to store instructions. Controllers may be configured to transfer instructions from the memories to the computing devices. One or more of the computing devices may each be configured to individually process, in parallel, at least a portion of the polynomial operations based on the homomorphic encryption according to an instruction transferred from a corresponding memory.

Crypto processor and electronic device including the same

A data processing apparatus spaced apart from a host and configured to process data in a memory in conjunction with the host includes a near-memory processing unit configured to receive a command from the host, compress or decompress the data in response to the command, and manage an entry of the compressed data; and a buffer configured to store the data or the compressed data based on the entry.

Data processing apparatus and method for zswap acceleration

A near-memory processing unit is configured to compress a page present in a normal memory space of a memory when receiving a swap-out command from a host, allocate a memory area in which the compressed page is to be stored in a compressed memory space which is a memory area previously allocated by the host, copy the compressed page into the allocated memory area, generate an entry corresponding to the compressed page, and insert the generated entry into an entry tree.

Device and method to minimize off-chip access between host and peripherals

An apparatus with graphics processing includes: a memory configured to store therein acceleration structure data and primitive data for performing three-dimensional (3D) rendering; and a first processor implemented in the memory and configured to receive ray information, determine a first spatial box by performing a traversal on an acceleration structure in which scene objects are spatially partitioned based on the acceleration structure data and the ray information, and determine a first intersection point for performing the 3D rendering based on the primitive data, the ray information, and the first spatial box.

Apparatus and method with graphics processing

A crypto processor, a method of operating a crypto processor, and an electronic device including a crypto processor. A method of operating a crypto processor for performing a polynomial multiplication of lattice-based texts includes transferring coefficients of polynomials for the polynomial multiplication to multipliers, performing multiplications for a portion of the coefficients in parallel using the multipliers, performing an addition for a portion of results of the multiplications using an adder, and determining a result of the polynomial multiplication based on another portion of the results of the multiplications and a result of the addition.

Crypto processor, method of operating crypto processor, and electronic device including crypto processor

A processor device includes a scheduler and a performance counter. The scheduler schedules commands of a first command set and commands of a second command set for a functional unit. A performance counter counts numbers of times where events of interest respectively occur while the functional unit processes first operations directed by the first command set and second operations directed by the second command set. The commands of the first command set are repeatedly scheduled such that the numbers of times for all the events of interest are counted with regard to the first operations. The commands of the second command set are scheduled after the numbers of times for all the events of interest are counted with regard to the first operations.

Processor device collecting performance information through command-set-based replay

A ray tracing apparatus includes a ray generator and a traversal (TRV)/intersection test (IST) integrator. The ray generator is configured to generate a ray. The TRV/IST integrator is configured to receive the ray, determine one of a ray-node intersection test, an intersection distance test, and a hit point test to be performed based on a state of the ray input thereto, and perform the determined test with respect to the ray. The ray-node intersection test, the intersection distance test, and the hit point test are performed with respect to the ray through same pipeline.

Ray tracing apparatus and method

A method of compensating for a movement of a head-mounted display (HMD) includes sensing the movement of the HMD, predicting a movement of the HMD based on the sensed movement, projecting and rendering an image based on the predicted movement, re-sensing the movement of the HMD, re-predicting the movement of the HMD based on the re-sensed movement, determining an error value based on a comparison between the predicted movement of the HMD and the re-predicted movement of the HMD, and re-projecting and rendering the image based on the determined error value.

Method and apparatus for compensating for movement of head-mounted display

A rendering system includes: a ray generator configured to generate a ray; a memory chip configured to store information about objects in three-dimensional (3D) space; an intersection tester embedded in the memory chip and configured to perform an intersection test between the ray and the objects by using the information about the objects and information about the ray; and a shader configured to perform pixel shading based on a result of the intersection test.

Rendering system and method

A method of generating a ray tracing acceleration structure includes transformatively mapping locations of object primitives in a three dimensional first space into Morton codes indicating respective locations of the primitives along a meandering linear path through the first space; determining a Morton distance indicating a difference between a first Morton code corresponding with a first primitive and a second Morton code corresponding with a second primitive; generating an acceleration structure to include nodes representing portions of the first space and adaptively adjusting a reference level of the acceleration structure, based on the Morton distance between primitives; and dividing the first space using a first division method when a level of a first node of the acceleration structure which corresponds to the first space is lower than the reference level, and dividing the first space using a second division method when the level of the first node exceeds the reference level.

Method and apparatus generating acceleration structure

A method of traversing an acceleration structure (AS) in a ray tracing system includes obtaining information about child nodes of a target node included in the AS; determining whether each of the child nodes intersects a ray based on the obtained information; determining a next target node among at least one child node that intersects the ray; and performing an operation corresponding to a type of the determined next target node.

Apparatus and method of traversing acceleration structure in ray tracing system

A ray tracing apparatus includes a traversal (TRV) core configured to traverse an acceleration structure (AS) to detect a first node and a second node, which intersect with a generated ray and have a determined same parent node, and to determine whether the ray intersects with an overlap region where a first bounding box corresponding to the first node overlaps a second bounding box corresponding to the second node; and, an intersection test (IST) determiner configured to calculate a first hit point where the ray intersects with a primitive belonging to the first node, which is a closer node to a view point of the ray among the first node and the second node, and to determine a final hit point of the ray based on a result of the determining of whether the ray intersects with respect to an overlap region, by the TRV core.

A rendering method includes determining frames. The rendering method further includes successively rendering same regions of the frames. In another general aspect, rendering device includes an inter-frame determining unit configured to determine frames. The rendering device further includes a rendering unit configured to successively render same regions of the frames.

Method and apparatus for rendering same regions of multi frames

A method of generating an acceleration structure for ray tracing, the method including, using a processor, dividing a three-dimensional (3D) space including primitives into bounding boxes, obtaining position information of where the bounding boxes overlapping each other, and generating an acceleration structure representing the position information and an inclusion relation between the bounding boxes. Also disclosed is a related method of traversing an acceleration structure.

Growing community of inventors

Hwaseong-si, South Korea

Youngsam Shin