Samsung Electronics Co., Ltd.

Youngdeok Seo

Jinyoung Kim

Sehwan Park

Dongmin Shin

Hyunkyo Oh

Ilhan Park

Woohyun Kang

Heewon Lee

Hyuna Kim

Donghoo Lim

Sanghyun Choi

Kangho Roh

Joonsuc Jang

Sungmin Joe

Jin-Young Kim

Jisoo Kim

Sangkwon Moon

Chanha Kim

Suhyun Kim

Se Hwan Park

Su Chang Jeon

Yeonji Kim

Hee-Tai Oh

Byungkwan Chun

Jinbaek Song

Shinho Oh

Heetai Oh

Silwan Chang

Youngjoo Seo

An operation method for controlling a nonvolatile memory device includes initiating a first instance of a respective reliability operation for a respective memory block included in the nonvolatile memory device. The respective reliability operation includes detecting a degradation level of the respective memory block and setting a respective skip reference value based on the detected degradation level. The operation method also includes determining whether a respective number of consecutively skipped instances of the respective reliability operation is less than the respective skip reference value. The operation method further includes selectively skipping or performing a next instance of the respective reliability operation based on the determination result.

Operation method of storage controller for nonvolatile memory device

A memory device may include a memory block and a control circuit. The memory block may include a first sub-block and a second sub-block that are connected between a common source line and a plurality of bit lines and may be vertically stacked. The control circuit may be configured to select any one of the common source line and the plurality of bit lines as a transmission path of an erase voltage based on positions of the first sub-block and the second sub-block, and perform erase operations on the first sub-block and the second sub-block in units of sub-blocks.

Memory device that performs erase operation to preserve data reliability

A method of operating a non-volatile memory device, which is configured to communicate with a storage controller includes: receiving a first request indicating a read reclaim determination and including environment information from the storage controller, performing a first on-chip read operation for generating first distribution information based on the first request, determining whether a read reclaim is required based on the first distribution information, and providing the storage controller with a determination result having a first bit value in response to determining that the read reclaim is required.

Non-volatile memory device determining read reclaim, method of operating the same, and method of operating storage device including the same

Disclosed is a storage controller which includes a history table and communicates with a non-volatile memory device. A method of operating the storage controller includes determining whether history data of a target memory block are registered at the history table, providing a history read request for the target memory block based on the history data when it is determined that the history data are registered, receiving first raw data corresponding to the history read request from the non-volatile memory device, generating skew information of the target memory block based on the first raw data and the history data, and determining whether to perform a read reclaim operation of the target memory block, based on the skew information.

Storage controller using history data, method of operating the same, and method of operating storage device including the same

Disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. The method includes providing a read command to the non-volatile memory device, receiving first read data and first distribution information corresponding to the read command from the non-volatile memory device, determining whether an error of the first read data is uncorrectable, and updating offset information of a history table in the storage controller based on the first distribution information, in response to determining that the error of the first read data is correctable.

Storage controller receiving read data and distribution information, method of operating the same, and method of operating storage device including the same

A controller including a non-volatile memory interface circuit connected to at least one non-volatile memory device and configured to control the at least one non-volatile memory device; an error correction circuit configured to perform an error correction operation on a codeword received from the non-volatile memory interface circuit according to an error correction decoding level from among a plurality of error correction decoding levels, wherein the non-volatile memory interface circuit is further configured to: receive side information from the at least one non-volatile memory device; predict a distribution of memory cells based on the side information; and select the error correction decoding level from among the plurality of error correction decoding levels according to the predicted distribution.

Non-volatile memory device, controller for controlling the same, storage device having the same, and reading method thereof

Disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. The method includes outputting a first command including a request for on-chip valley search (OVS) count data of a memory region of the non-volatile memory device to the non-volatile memory device, wherein the OVS count data includes a first count value and a second count value of a first read voltage and a third count value and a fourth count value of a second read voltage, receiving the OVS count data from the non-volatile memory device, determining a distribution type of the memory region to be a predicted distribution type, from among a plurality of distribution types, based on the OVS count data, and determining a subsequent operation, based on the predicted distribution type.

Storage controller determining distribution type, method of operating the same, and method of operating storage device including the same

A nonvolatile memory device includes a memory block including a memory area, an on-chip valley search (OVS) circuit performing an OVS sensing operation on the memory block, and a buffer memory storing at least one variation table including variation information of a threshold voltage of memory cells, obtained from the OVS sensing operation. A reading operation including an OVS sensing operation and a main sensing operation on the memory area is performed in response to a read command applied by a memory controller, the OVS sensing operation is performed at an OVS sensing level, and the main sensing operation is performed at a main sensing level reflecting the variation information. In the nonvolatile memory device, correction accuracy for deterioration of a word line threshold voltage may be improved, and a burden on a memory controller may be reduced.

Nonvolatile memory device, with valley search for threshold voltage, memory controller, and reading method of storage device including the same

A storage device includes a nonvolatile memory device and a memory controller to control the nonvolatile memory device. The nonvolatile memory device includes a memory cell array. The memory cell array includes a normal cell region, a parity cell region and a redundancy cell region. First bit-lines are connected to the normal cell region and the parity cell region and second bit-lines are connected to the redundancy cell region. The memory controller includes an error correction code (ECC) engine to generate parity data. The memory controller stores user data in the normal cell region, controls the nonvolatile memory device to perform a column repair on first defective bit-lines among the first bit-lines, assigns additional column addresses to the first defective bit-lines and the second bit-lines and stores at least a portion of the parity data in a region corresponding to the additionally assigned column addresses.

Storage devices and methods of operating storage devices

Disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. The method includes outputting a first command including a request for on-chip valley search (OVS) count data of a memory region of the non-volatile memory device to the non-volatile memory device, wherein the OVS count data include a first count value of a first read voltage and a second count value of a second read voltage, receiving the OVS count data from the non-volatile memory device, determining a first error count value for the first read voltage and a second error count value for the second read voltage, based on the OVS count data, and determining a subsequent operation, based on the first and second error count values.

Storage controller determining error count, method of operating the same, and method of operating storage device including the same

A method of operating a nonvolatile memory device is provided. The method includes: dividing a memory block of a plurality of memory blocks provided in the nonvolatile memory device into a plurality of retention groups; generating time-difference information including a plurality of erase program interval (EPI) values corresponding to the plurality of retention groups; generating offset information including a plurality of offset values corresponding to differences between a plurality of default read voltages and a plurality of corrected read voltages; generating compensated read voltages corresponding to a read address based on the offset information and the time-difference information; and performing a read operation to read data from the nonvolatile memory device based on the read address and the compensated read voltages.

Storage device including nonvolatile memory device and method of operating the same

A nonvolatile memory device includes; a memory cell array including a meta data region storing chip-level information, control logic identifying a target cell in response to a command, machine learning (ML) logic inferring an optimum parameter based on the chip-level information and physical information associated with the target cell applied as inputs to an artificial neural network model, and a buffer memory configured to store weight parameters of the artificial neural network model.

Nonvolatile memory device including artificial neural network, memory system including same, and operating method of nonvolatile memory device including artificial neural network

A memory system includes a non-volatile memory device including a machine learning (ML) module and a peripheral power management integrated circuit (IC), and a memory controller configured to command the non-volatile memory device to enter an idle mode by providing an external power command to the non-volatile memory device. The machine learning (ML) module configures a neural network and trains the neural network via machine learning, and the peripheral power management IC is configured to generate an internal power command that is different from the external power command based on the external power command and monitoring information corresponding to the ML module.

Non-volatile memory device, a memory system that includes the non-volatile memory device, and an operating method of the non-volatile memory device

A nonvolatile memory device includes a plurality of memory blocks and a control logic circuit configured to perform a first page on-chip valley search (OVS) operation on memory cells connected to one wordline of a memory block selected in response to an address, among the plurality of memory blocks, in response to a first read command. The control logic circuit is further configured to change a read level of at least one state using detection information of the first page OVS operation, and to perform a second page read operation on the memory cells using the changed read level in response to a second read command.

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Seoul, South Korea

Youngdeok Seo